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Московский государственный университет приборостроения и информатики

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LT6010

APPLICATIOUS IUFORWATIOU

Offset Voltage Adjustment

The input offset voltage of the LT6010 and its drift with temperature are permanently trimmed at wafer testing to the low level as specified in the electrical characteristic. However,iffurtheradjustmentofVOSisdesired,nullingwith a 50k potentiometer is possible and will not degrade drift with temperature. Trimming to a value other than zero

creates a drift of (VOS/300 V) V/°C, e.g., if VOS is adjusted to 300 V, the change in drift will be 1 V/°C. The adjustment

range with a 50k pot is approximately ±0.9mV (see Figures 1A and 1B). The sensitivity and resolution of the nulling can be improved by using a smaller pot in conjunction with fixed resistors. The configuration shown has an approximate nulling range of ±150 V (see Figures 2A and 2B).

Standard Adjustment

								1.0
								1.0
							(mV)	0.8
							(mV)	0.6
			50k			VCC	VOLTAGE	0.4
			50k			VCC		0.4
		–					OFFSETIN	0.2
2		–	8				OFFSETIN	0
	1
				7				–0.2
							CHANGE	–0.4
INPUT			LT6010			OUTPUT		–0.4
								–0.6
				6
3		+		6
3
			4					–0.8
								–0.8

					6010 F01a			–1.0
					6010 F01a
			Vee
			Vee					0

Figure 1A

								Improved Sensitivity Adjustment
									200
									200
								V)	150
				10k					150
				10k
								(	100
								VOLTAGE	100
				50k			VCC	VOLTAGE	50
				50k			VCC	OFFSET

		1		10k					0
				10k					0

	2			8				IN	–50
	2		–	8				IN	–50
3			–		7			CHANGE
3		+			7			CHANGE	–150
INPUT				LT6010			OUTPUT		–100
									–100
					6
					6
				4					–200
				4
						6010 F02a


				Vee					0

Figure 2A

0.2

0.4

0.6

0.8

1.0

POTENTIOMETER POSITION

6010 F01b

Figure 1B

0.2

0.4

0.6

0.8

1.0

POTENTIOMETER POSITION

6010 F02b

Figure 2B

sn6010 6010fs

LT6010

APPLICATIOUS IUFORWATIOU

Shutdown

The LT6010 can be put into shutdown mode to conserve power. When the SHDN pin is biased at less than 0.2V above the negative supply, the part operates normally. When pulled 2V or more above V–, the supply current drops to about 12 A, shutting down the op amp.

The output of the LT6010 op amp is not isolated from the inputs while in shutdown mode. Therefore, this shutdown feature cannot be used for multiplexing applications.

There is an internal 85k resistor at the SHDN pin. If the

SHDN voltage source is more than 2V above the negative supply, an external series resistor can be placed between the source and SHDN pin to reduce SHDN pin current (see Figure 3). For an example of suggested values see Table 1. The resistors listed ensure that the voltage at the SHDN pin is 2V above the negative supply.

Table 1

VSHDN (V)	RSHDN (kΩ)
2	NONE

3	77k

4	153k

5	230k

RSHDN	SHDN	85k
+	5
+

VSHDN

–

VEE		VEE

	6010 F03

Figure 3

Capacitive Loads

The LT6010 can drive capacitive loads up to 500pF in unity gain. The capacitive load driving capability increases as the amplifier is used in higher gain configurations. A small series resistance between the output and the load further increases the amount of capacitance that the amplifier can drive.

Rail-to-Rail Operation

The LT6010 outputs can swing to within millivolts of either supply rail, but the inputs cannot. However, for most op amp configurations, the inputs need to swing less than the outputs. Figure 4 shows the basic op amp configurations, lists what happens to the op amp inputs and specifies whether or not the op amp must have rail-to-rail inputs. Select a rail-to-rail input op amp only when really necessary, because the input precision specifications are usually inferior.

VREF		+

VIN –

INVERTING: AV = –RF/RG

OP AMP INPUTS DO NOT MOVE,

BUT ARE FIXED AT DC BIAS

POINT VREF

INPUT DOES NOT HAVE TO BE

RAIL-TO-RAIL

VIN	+
	–
	RG

VIN +

–

	VREF	6010 F04
	VREF
	NONINVERTING: AV = 1 + RF/RG	NONINVERTING: AV = 1
	INPUTS MOVE AS MUCH AS	INPUTS MOVE AS MUCH AS THE
	VIN, BUT THE OUTPUT MOVES	OUTPUT
	MORE	INPUT MUST BE RAIL-TO-RAIL
	INPUT MAY NOT HAVE TO BE	INPUT MUST BE RAIL-TO-RAIL
	INPUT MAY NOT HAVE TO BE	FOR OVERALL CIRCUIT
	RAIL-TO-RAIL	RAIL-TO-RAIL PERFORMANCE

Figure 4. Some Op Amp Configurations Do Not Require Rail-to-Rail Inputs to Achieve Rail-to-Rail Outputs

sn6010 6010fs

LT6010

SIWPLIFIED SCHEWATIC

V+	7
NULL	1	R3	R4	8	NULL	R5			R6
NULL	1	R3	R4	8	NULL	R5
		Q7
						Q6		Q18	Q19
			Q8			Q5	RC1	C1
						Q5	RC1
		Q3		Q4		C2		Q13
		Q3				C2		Q13
				Q21		Q17		D3	6	OUT
				B		Q17		D3	6	OUT
				B
BIAS CURRENT				A				D4
GENERATOR								D5
							Q12	D5
					Q16		Q12		C3
		R1		Q10	Q16			Q14	C3
		R1		Q10				Q14	Q20
	2	500Ω		C					Q20
–IN				C
–IN		D1	D2	B
				B
				A
+IN	3			A
+IN	3

R2
500Ω	Q1	Q2	Q11

SHDN	5	Q15	Q9	Q10
V–	4			6010 SS

sn6010 6010fs

LT6010

PACKAGE DESCRIPTIOU

		DD Package
		8-Lead Plastic DFN (3mm × 3mm)
		(Reference LTC DWG # 05-08-1698)
		0.675 ±0.05
3.5 ±0.05	1.65 ±0.05
2.15 ±0.05	(2 SIDES)
		PACKAGE
		OUTLINE
	0.28 ± 0.05	0.50
		0.50
		BSC
		2.38 ±0.05
		(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
			R = 0.115	0.38 ± 0.10
			TYP	0.38 ± 0.10
			TYP
			5	8
		3.00 ±0.10	1.65 ± 0.10
		(4 SIDES)	(2 SIDES)
	PIN 1
	TOP MARK
				(DD8) DFN 0203
			4	1
	0.200 REF	0.75 ±0.05	0.28 ± 0.05	0.50 BSC
				0.50 BSC
			2.38 ±0.10
		0.00 – 0.05	(2 SIDES)
		0.00 – 0.05	BOTTOM VIEW—EXPOSED PAD
			BOTTOM VIEW—EXPOSED PAD

NOTE:

1.DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)

2.ALL DIMENSIONS ARE IN MILLIMETERS

3.DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

4.EXPOSED PAD SHALL BE SOLDER PLATED

sn6010 6010fs

LT6010

PACKAGE DESCRIPTIOU

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

.189 – .197

.045 ±.005

(4.801 – 5.004)

.050 BSC

NOTE 3

.245

.160

±.005

MIN

.150 – .157

.228 – .244

(3.810 – 3.988)

(5.791 – 6.197)

NOTE 3

.030 ±.005

TYP

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

× 45°

.053 – .069

(0.254 – 0.508)

(1.346 – 1.752)

.004 – .010

.008 – .010

(0.203 – 0.254)

.016 – .050

0°– 8

°TYP

(0.101 – 0.254)

.014 – .019

.050

NOTE:

(0.406 – 1.270)

(0.355 – 0.483)

(1.270)

INCHES

TYP

BSC

1. DIMENSIONS IN

(MILLIMETERS)

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

SO8 0303

sn6010 6010fs

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- 15 tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LT6010

TYPICAL APPLICATIOU

	Precision JFET Input Transimpedance Photodiode Amplifier
			C4	C3
			0.5pF	1pF
			V+	R3
				100k, 1%
			J1
	+			–
	U1		R4	U2	VOUT
	LT6010		2.55k	LT6230	VOUT
	–	R2	V–	+
	R1	1k	V–
	330k, 5%	5%
	C2			J1: PHILIPS BF862
S1	0.1µF	C1		S1: SIEMENS/INFINEON SFH203 PHOTODIODE (~3pF)
S1	0.1µF	C1		VSUPPLY = ±5V
		0.01µF		VSUPPLY = ±5V
		0.01µF		ISUPPLY = 5.6mA
				ISUPPLY = 5.6mA
	V–			BANDWIDTH = 6MHz
	V–			AZ = 100kΩ
				OUTPUT OFFSET ≈50µV TYPICALLY
					6010 TA02

RELATED PARTS

PART NUMBER	DESCRIPTION	COMMENTS

LT6011/6012	Dual/Quad Precision Op Amps	135 A, Rail-to-Rail Output

LT1001	Low Power, Picoamp Input Precision Op Amp	250pA Input Bias Current

LT1880	Rail-to-Rail Output, Picoamp Input Precision Op Amp	CLOAD up to 1000pF

16	Linear Technology Corporation
	1630 McCarthy Blvd., Milpitas, CA 95035-7417

sn6010 6010fs

LT/TP 1203 1K • PRINTED IN USA

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

LINEAR TECHNOLOGY CORPORATION 2003

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