STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB |
List of figures |
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List of figures
Figure 1. |
STM32F100xx value line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
12 |
Figure 2. |
Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
13 |
Figure 3. |
STM32F100xx value line LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
23 |
Figure 4. |
STM32F100xx value line LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
24 |
Figure 5. |
STM32F100xx value line LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
24 |
Figure 6. |
STM32F100xx value line TFBGA64 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
25 |
Figure 7. |
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
30 |
Figure 8. |
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
Figure 9. |
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
Figure 10. |
Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
Figure 11. |
Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
33 |
Figure 12. |
Maximum current consumption in Run mode versus frequency (at 3.6 V) - |
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code with data processing running from RAM, peripherals enabled. . . . . . . . . . . . . . . . . . |
39 |
Figure 13. |
Maximum current consumption in Run mode versus frequency (at 3.6 V) - |
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code with data processing running from RAM, peripherals disabled . . . . . . . . . . . . . . . . . |
39 |
Figure 14. |
Typical current consumption on VBAT with RTC on vs. temperature at different VBAT |
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values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
40 |
Figure 15. |
Typical current consumption in Stop mode with regulator in Run mode versus |
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temperature at VDD = 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
41 |
Figure 16. |
Typical current consumption in Stop mode with regulator in Low-power mode versus |
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temperature at VDD = 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
41 |
Figure 17. |
Typical current consumption in Standby mode versus temperature at VDD = 3.3 V and |
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3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
42 |
Figure 18. |
High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
47 |
Figure 19. |
Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
47 |
Figure 20. |
Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
48 |
Figure 21. |
Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
49 |
Figure 22. |
Standard I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
56 |
Figure 23. |
Standard I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
56 |
Figure 24. |
5 V tolerant I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
57 |
Figure 25. |
5 V tolerant I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
57 |
Figure 26. |
I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
60 |
Figure 27. |
Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
60 |
Figure 28. |
I2C bus AC waveforms and measurement circuit(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
63 |
Figure 29. |
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
65 |
Figure 30. |
SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
65 |
Figure 31. |
SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
66 |
Figure 32. |
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
69 |
Figure 33. |
Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
69 |
Figure 34. |
Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . . |
70 |
Figure 35. |
Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . . |
70 |
Figure 36. |
12-bit buffered /non-buffered DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
72 |
Figure 37. |
LQFP100, 14 x 14 mm, 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . |
75 |
Figure 38. |
Recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
75 |
Figure 39. |
LQFP64 – 10 x 10 mm, 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . |
76 |
Figure 40. |
Recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
76 |
Figure 41. |
TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm pitch, package outline . . . . . . . . . . |
77 |
Figure 42. |
Recommended PCB design rules for pads (0.5 mm pitch BGA) . . . . . . . . . . . . . . . . . . . . |
78 |
Doc ID 16455 Rev 3 |
7/86 |
List of figures |
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB |
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Figure 43. |
LQFP48 – 7 x 7 mm, 48-pin low-profile quad flat |
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package outline. . . . . . . . . |
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 |
Figure 44. |
Recommended footprint(1) . |
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 |
Figure 45. |
LQFP100 PD max vs. TA . . |
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 |
8/86 |
Doc ID 16455 Rev 3 |
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB |
Introduction |
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1 Introduction
This datasheet provides the ordering information and mechanical device characteristics of the STM32F100x4, STM32F100x6, STM32F100x8 and STM32F100xB value line microcontrollers. In the rest of the document, the STM32F100x4 and STM32F100x6 are referred to as low-density devices while the STM32F100x8 and STM32F100xB are identified as medium-density devices.
The STM32F100xx datasheet should be read in conjunction with the lowand mediumdensity STM32F100xx reference manual.
For information on programming, erasing and protection of the internal Flash memory please refer to the STM32F100xx Flash programming manual.
The reference and Flash programming manuals are both available from the STMicroelectronics website www.st.com.
For information on the Cortex™-M3 core please refer to the Cortex™-M3 Technical Reference Manual, available from the www.arm.com website at the following address: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337e/.
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Doc ID 16455 Rev 3 |
9/86 |
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