MINIMUM HARDWARE CONSIDERATIONS

If the A/D converter will be used, connect VREF to a separate reference supply to minimize noise during A/D conversions. Even if the A/D converter will not be used, VREF and ANGND must be connected to provide power to port 0. Refer to “Analog Ground and Reference Voltages” on page 11-13 for a detailed discussion of A/D power and ground recommendations.

Multilayer printed circuit boards with separate VCC and ground planes also help to minimize noise. For more information on noise protection, refer to AP-125, Designing Microcontroller Systems for Noisy Environments and AP-711, EMI Design Techinques for Microcontrollers in Automotive Applications.

13.4 PROVIDING THE CLOCK

The device can either use the on-chip oscillator to generate the clocks or use an external clock input signal. The following paragraphs describe the considerations for both methods.

13.4.1 Using the On-chip Oscillator

The on-chip oscillator circuit (Figure 13-3) consists of a crystal-controlled, positive reactance oscillator. In this application, the crystal operates in a parallel resonance mode. The feedback resistor, Rf, consists of paralleled n-channel and p-channel FETs controlled by the internal powerdown signal. In powerdown mode, Rf acts as an open and the output drivers are disabled, which disables the oscillator. Both the XTAL1 and XTAL2 pins have built-in electrostatic discharge (ESD) protection.

13-5

8XC196Kx, Jx, CA USER’S MANUAL

Oscillator Enable# (from powerdown circuitry)

VSS

A0076-03

Figure 13-3. On-chip Oscillator Circuit

Figure 13-4 shows the connections between the external crystal and the device. When designing an external oscillator circuit, consider the effects of parasitic board capacitance, extended operating temperatures, and crystal specifications. Consult the manufacturer’s datasheet for performance specifications and required capacitor values. With high-quality components, 20 pF load capacitors (CL) are usually adequate for frequencies above 1 MHz.

Noise spikes on the XTAL1 or XTAL2 pin can cause a miscount in the internal clock-generating circuitry. Capacitive coupling between the crystal oscillator and traces carrying fast-rising digital signals can introduce noise spikes. To reduce this coupling, mount the crystal oscillator and capacitors near the device and use short, direct traces to connect to XTAL1, XTAL2, and VSS. To further reduce the effects of noise, use grounded guard rings around the oscillator circuitry and ground the metallic crystal case.

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MINIMUM HARDWARE CONSIDERATIONS

C1

XTAL1

8XC196 Device

XTAL2

C2

Quartz Crystal

Note:

Mount oscillator components close to the device and use short, direct traces to XTAL1, XTAL2, and Vss. When using crystals, C1=C2≈20 pF. When using ceramic resonators, consult the manufacturer for recommended oscillator circuitry.

A0273--02

Figure 13-4. External Crystal Connections

13.4.2 Using a Ceramic Resonator Instead of a Crystal Oscillator

In cost-sensitive applications, you may choose to use a ceramic resonator instead of a crystal oscillator. Ceramic resonators may require slightly different load capacitor values and circuit configurations. Consult the manufacturer’s datasheet for the required oscillator circuitry.

13.4.3 Providing an External Clock Source

To use an external clock source, apply a clock signal to XTAL1 and let XTAL2 float (Figure 13-5). To ensure proper operation, the external clock source must meet the minimum high and

low times (TXHXX and TXLXX) and the maximum rise and fall transition times (TXLHX and TXHXL) (Figure 13-6). The longer the rise and fall times, the higher the probability that external noise will

affect the clock generator circuitry and cause unreliable operation. See the datasheet for required XTAL1 voltage drive levels and actual specifications.

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