MEMORY PARTITIONS

The following example initializes the top of the upper register file (8XC196CA, JT, JV, KS, KT) as the stack. (For the 8XC196JR or KR, the immediate value would be #200H; for the 8XC196JQ or KQ, it would be #180H.)

The following example shows how to allow the linker locator to determine where the stack fits in the memory map that you specify.

LD SP, #STACK

4.1.7.3CPU Special-function Registers (SFRs)

Locations 0000–0017H in the lower register file are the CPU SFRs (Table 4-7). Appendix C describes the CPU SFRs.

Table 4-7. CPU SFRs

NOTE

Using any SFR as a base or index register for indirect or indexed operations can cause unpredictable results. External events can change the contents of SFRs, and some SFRs are cleared when read. For this reason, consider the implications of using an SFR as an operand in a read-modify-write instruction (e.g., XORB).

4.2WINDOWING

Windowing expands the amount of memory that is accessible with register-direct addressing. Register-direct addressing can access the lower register file with short, fast-executing instructions. With windowing, register-direct addressing can also access the upper register file and peripheral SFRs.

4-13

8XC196Kx, Jx, CA USER’S MANUAL

Windowing maps a segment of higher memory (the upper register file or peripheral SFRs) into the lower register file. The window selection register (WSR) selects a 32-, 64-, or 128-byte segment of higher memory to be windowed into the top of the lower register file space. Figure 4-2 shows the upper register file of the 8XC196CA, JT, JV, KS, and KT devices. Please refer to Table 4-1 on page 4-2 for the upper register file addresses for other devices.

The 8XC196JV has additional register RAM in locations 1C00–1DFFH. Like the general-pur- pose register RAM in the upper register file, this register RAM can be windowed and is accessed directly, without the use of the memory controller.

A3060-01

Figure 4-2. Windowing

NOTE

Memory-mapped SFRs must be accessed using indirect or indexed addressing modes; they cannot be windowed. Reading a memory-mapped SFR through a window returns FFH (all ones). Writing to a memory-mapped SFR through a window has no effect.

4.2.1Selecting a Window

The window selection register (Figure 4-3) has two functions. The HLDEN bit (WSR.7) enables and disables the bus-hold protocol (see Chapter 15, “Interfacing with External Me mory”); it is unrelated to windowing. The remaining bits select a window to be mapped into the top of the lower register file.

4-14

MEMORY PARTITIONS

Table 4-8 on page 4-16 provides a quick reference of WSR values for windowing the peripheral SFRs. Table 4-9 on page 4-16 lists the WSR values for windowing the upper register file. Table 4-9 on page 4-16 lists the WSR values for windowing the additional register RAM of the 8XC196JV.

The window selection register (WSR) has two functions. One bit enables and disables the bus-hold protocol. The remaining bits select windows. Windows map sections of RAM into the upper section of the lower register file, in 32-, 64-, or 128-byte increments. PUSHA saves this register on the stack and POPA restores it.

† On the 8XC196CA, Jx devices this bit is reserved; always write as zero.

Figure 4-3. Window Selection Register (WSR)

4-15