CHAPTER 1
GUIDE TO THIS MANUAL
This manual describes the 8XC196Kx, Jx, CA family of embedded microcontrollers. It is intended for use by both software and hardware designers familiar with the principles of microcontrollers. This chapter describes what you’ll find in this manual, lists other documents that may be useful, and explains how to access the support services we provide to help you complete your design.
1.1MANUAL CONTENTS
This manual contains several chapters and appendixes, a glossary, and an index. This chapter, Chapter 1, provides an overview of the manual. This section summarizes the contents of the remaining chapters and appendixes. The remainder of this chapter describes notational conventions and terminology used throughout the manual, provides references to related documentation, describes customer support services, and explains how to access information and assistance.
Chapter 2 — Architectural Overview — provides an overview of the device hardware. It describes the core, internal timing, internal peripherals, and special operating modes.
Chapter 3 — Programming ConsiderAtions — provides an overview of the instruction set, describes general standards and conventions, and defines the operand types and addressing modes supported by the MCS® 96 microcontroller family. (For additional information about the instruction set, see Appendix A.)
Chapter 4 — Memory Partitions — describes the addressable memory space of the device. It describes the memory partitions, explains how to use windows to increase the amount of memory that can be accessed with register-direct (8-bit) instructions, and provides examples of memory configurations.
Chapter 5 — Standard and PTS Interrupts — describes the interrupt control circuitry, priority scheme, and timing for standard and peripheral transaction server (PTS) interrupts. It also explains interrupt programming and control.
Chapter 6 — I/O Ports — describes the input/output ports and explains how to configure the ports for input, output, or special functions.
Chapter 7 — Serial I/O (SIO) Port — describes the asynchronous/synchronous serial I/O (SIO) port and explains how to program it.
Chapter 8 — Synchronous Serial I/O (SSIO) Port — describes the synchr onous serial I/O (SSIO) port and explains how to program it.
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8XC196Kx, Jx, CA USER’S MANUAL
Chapter 9 — Slave Port — describes the slave port of the 8XC196Kx and explains how to program it. Chapter 6, “I/O Ports,” explains how to configure port 3 to serve as the slave port. This chapter discusses additional configurations specific to the slave port function and describes how to use the slave port for interprocessor communication.
Chapter 10 — Event Processor Array (EPA) — describes the event processor array, a tim- er/counter-based, high-speed input/output unit. It describes the timer/counters and explains how to program the EPA and how to use the EPA to produce pulse-width modulated (PWM) outputs.
Chapter 11 — Analog-to-digital Converter — provides an overview of the analog-to-digital (A/D) converter and describes how to program the converter, read the conversion results, and interface with external circuitry.
Chapter 12 — CAN Serial Communications Controller — describes the 8XC196CA’s integrated CAN controller and explains how to configure it. This integrated peripheral is similar to Intel’s standalone 82527 CAN serial communications controller, supporting both the standard and extended message frames specified by the CAN 2.0 protocol parts A and B.
Chapter 13 — Minimum Hardware Considerations — describes options for providing the basic requirements for device operation within a system, discusses other hardware considerations, and describes device reset options.
Chapter 14 — Special Operating Modes — |
provides an overview of the idle, powerdown, |
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and on-circuit emulation (ONCE) modes and describes how to enter and exit each mode. |
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Chapter 15 — Interfacing with External Memory — |
lists the external memory signals and de- |
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scribes the registers that control the external memory interface. It discusses the bus width and memory configurations, the bus-hold protocol, write-control modes, and internal wait states and ready control. Finally, it provides timing information for the system bus.
Chapter 16 — Programming the Nonvolatile Memory — provides recommended circuits, the corresponding memory maps, and flow diagrams. It also provides procedures for auto programming, and describes the commands used for serial port programming.
Appendix A — Instruction Set Reference — provides reference information for the instruction set. It describes each instruction; defines the program status word (PSW) flags; shows the relationships between instructions and PSW flags; and lists hexadecimal opcodes, instruction lengths, and execution times. (For additional information about the instruction set, see Chapter 3, “Programming ConsiderAtions.”)
Appendix B — Signal Descriptions — provides reference information for the device pins, including descriptions of the pin functions, reset status of the I/O and control pins, and package pin assignments.
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GUIDE TO THIS MANUAL
Appendix C — Registers — provides a compilation of all device registers arranged alphabetically by register mnemonic. It also includes tables that list the windowed direct addresses for all SFRs in each possible window.
Glossary — defines terms with special meaning used throughout this manual.
Index — lists key topics with page number references.
1.2NOTATIONAL CONVENTIONS AND TERMINOLOGY
The following notations and terminology are used throughout this manual. The Glossary defines other terms with special meanings.
# |
The pound symbol (#) has either of two meanings, depending on the |
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context. When used with a signal name, the symbol means that the |
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signal is active low. When used in an instruction, the symbol prefixes |
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an immediate value in immediate addressing mode. |
Assert and Deassert |
The terms assert and deassert refer to the act of making a signal |
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active (enabled) and inactive (disabled), respectively. The active |
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polarity (high/low) is defined by the signal name. Active-low signals |
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are designated by a pound symbol (#) suffix; active-high signals have |
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no suffix. To assert RD# is to drive it low; to assert ALE is to drive it |
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high; to deassert RD# is to drive it high; to deassert ALE is to drive it |
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low. |
Clear and Set |
The terms clear and set refer to the value of a bit or the act of giving |
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it a value. If a bit is clear, its value is “0”; clearing a bit gives it a “0” |
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value. If a bit is set, its value is “1”; setting a bit gives it a “1” value. |
Instructions |
Instruction mnemonics are shown in upper case to avoid confusion. |
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You may use either upper case or lower case. |
italics |
Italics identify variables and introduce new terminology. The context |
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in which italics are used distinguishes between the two possible |
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meanings. |
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Variables in registers and signal names are commonly represented by |
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x and y, where x represents the first variable and y represents the |
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second variable. For example, in register Px_MODE.y, x represents |
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the variable that identifies the specific port, and y represents the |
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register bit variable [7:0]. Variables must be replaced with the correct |
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values when configuring or programming registers or identifying |
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signals. |
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8XC196Kx, Jx, CA USER’S MANUAL
Numbers |
Hexadecimal numbers are represented by a string of hexadecimal |
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digits followed by the character H. Decimal and binary numbers are |
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represented by their customary notations. (That is, 255 is a decimal |
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number and 1111 1111 is a binary number. In some cases, the letter B |
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is appended to binary numbers for clarity.) |
Register Bits |
Bit locations are indexed by 7:0 (or 15:0), where bit 0 is the least- |
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significant bit and bit 7 (or 15) is the most-significant bit. An |
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individual bit is represented by the register name, followed by a |
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period and the bit number. For example, WSR.7 is bit 7 of the |
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window selection register. In some discussions, bit names are used. |
Register Names |
Register mnemonics are shown in upper case. For example, TIMER2 |
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is the timer 2 register; timer 2 is the timer. A register name containing |
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a lowercase italic character represents more than one register. For |
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example, the x in Px_REG indicates that the register name refers to |
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any of the port data registers. |
Reserved Bits |
Certain bits are described as reserved bits. In illustrations, reserved |
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bits are indicated with a dash (—). These bits are not used in this |
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device, but they may be used in future implementations. To help |
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ensure that a current software design is compatible with future imple- |
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mentations, reserved bits should be cleared (given a value of “0”) or |
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left in their default states, unless otherwise noted. |
Signal Names |
Signal names are shown in upper case. When several signals share a |
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common name, an individual signal is represented by the signal name |
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followed by a number. For example, the EPA signals are named |
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EPA0, EPA1, EPA2, etc. Port pins are represented by the port abbre- |
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viation, a period, and the pin number (e.g., P1.0, P1.1). A pound |
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symbol (#) appended to a signal name identifies an active-low signal. |
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