AC and DC Parameters
7.12Exception timing
Figure 7-11 shows the ARM7TDMI processor exception timing. The timing parameters used in Figure 7-11 are listed in Table 7-11.
MCLK
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Tabts |
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Tabth |
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ABORT |
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nFIQ |
Tis |
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Tim |
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nIRQ
Trs 
Trm 
nRESET
Figure 7-11 Exception timing
Note
In Figure 7-11, to guarantee recognition of the asynchronous interrupt (ISYNC=0) or reset source, the appropriate signals must be setup or held as follows:
•setup Tis and Trs respectively before the corresponding clock edge
•hold Tim and Tis respectively after the corresponding clock edge.
These inputs can be applied fully asynchronously where the exact cycle of recognition is unimportant.
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Table 7-11 Exception timing parameters |
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Parameter |
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Tabth |
ABORT hold time from MCLKf |
Minimum |
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Tabts |
ABORT set up time to MCLKf |
Minimum |
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Tim |
Asynchronous interrupt guaranteed nonrecognition time, with ISYNC=0 |
Maximum |
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Tis |
Asynchronous interrupt set up time to MCLKf for guaranteed recognition, with ISYNC=0 |
Minimum |
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Trm |
Reset guaranteed nonrecognition time |
Maximum |
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Trs |
Reset setup time to MCLKr for guaranteed recognition |
Minimum |
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ARM DDI 0029G |
Copyright © 1994-2001. All rights reserved. |
7-15 |
AC and DC Parameters
7.13Synchronous interrupt timing
Figure 7-12 shows the ARM7TDMI processor synchronous interrupt timing. The timing parameters used in Figure 7-12 are listed in Table 7-12.
MCLK
nFIQ |
Tsis |
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nIRQ |
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Tsih |
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Figure 7-12 Synchronous interrupt timing |
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Table 7-12 Synchronous interrupt timing parameters |
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Symbol |
Parameter |
Parameter type |
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Tsih |
Synchronous nFIQ, nIRQ hold from MCLKf with ISYNC=1 |
Minimum |
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Tsis |
Synchronous nFIQ, nIRQ setup to MCLKf, with ISYNC=1 |
Minimum |
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7-16 |
Copyright © 1994-2001. All rights reserved. |
ARM DDI 0029G |
AC and DC Parameters
7.14Debug timing
Figure 7-13 shows the ARM7TDMI processor synchronous interrupt timing. The timing parameters used in Figure 7-13 are listed in Table 7-13.
MCLK
Tdbgh
DBGACK
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BREAKPT |
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Tdbgd |
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DBGRQ |
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Tbrks |
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Tbrkh |
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EXTERN[1] |
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Trqs |
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Trqh |
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Texts |
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Texth |
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DBGRQI |
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Tdbgrq |
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RANGEOUT0 |
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RANGEOUT1 |
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Trgh |
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Trg |
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Figure 7-13 Debug timing |
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Table 7-13 Debug timing parameters |
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Symbol |
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Parameter |
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Parameter type |
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Tbrkh |
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Hold time of BREAKPT from MCLKr |
Minimum |
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Tbrks |
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Set up time of BREAKPT to MCLKr |
Minimum |
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Tdbgd |
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MCLKr to DBGACK valid |
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Maximum |
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Tdbgh |
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DGBACK hold time from MCLKr |
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Minimum |
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Tdbgrq |
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DBGRQ to DBGRQI valid |
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Maximum |
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Texth |
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EXTERN[1:0] hold time from MCLKf |
Minimum |
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Texts |
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EXTERN[1:0] set up time to MCLKf |
Minimum |
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Trg |
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MCLKf to RANGEOUT0, RANGEOUT1 valid |
Maximum |
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ARM DDI 0029G |
Copyright © 1994-2001. All rights reserved. |
7-17 |
AC and DC Parameters
Table 7-13 Debug timing parameters (continued)
Symbol |
Parameter |
Parameter type |
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Trgh |
RANGEOUT0, RANGEOUT1 hold time from MCLKf |
Minimum |
Trqh |
DBGRQ guaranteed non-recognition time |
Minimum |
Trqs |
DBGRQ set up time to MCLKr for guaranteed recognition |
Minimum |
7-18 |
Copyright © 1994-2001. All rights reserved. |
ARM DDI 0029G |