Preface

About this document

This document is a reference manual for the ARM7TDMI core.

Intended audience

This document has been written for experienced hardware and software engineers who are working with the ARM7TDMI processor.

Using this manual

This document is organized into the following chapters:

Chapter 1 Introduction

Introduction to the architecture.

Chapter 2 Programmer’s Model

32-bit ARM and 16-bit Thumb instruction sets.

Chapter 3 Memory Interface

Nonsequential, sequential, internal, and coprocessor register transfer memory cycles.

Chapter 4 Coprocessor Interface

Implementation of the specialized additional instructions for use with coprocessors and a description of the interface.

Chapter 5 Debug Interface

ARM7TDMI core hardware extensions for advanced debugging to make it simpler to develop application software, operating systems, and hardware.

Chapter 6 Instruction Cycle Timings

Instruction cycle timings.

Chapter 7 AC and DC Parameters

AC and DC parameters, timing diagrams, definitions, and operating data.

Appendix A Signal Description

ARM7TDMI core signals.

Appendix B Debug in Depth

Further information on the debug interface and EmbeddedICE macrocell.

Preface

Typographical conventions

The following typographical conventions are used in this book:

typewriter italic

Denotes arguments to commands and functions where the argument is to be replaced by a specific value.

typewriter bold

Denotes language keywords when used outside example code and ARM processor signal names.

Timing diagram conventions

The key provided in on page xx explains the components used in timing diagrams. Any variations are labeled when they occur. Therefore, no additional meaning must be attached unless specifically stated.

Shaded bus and signal areas are undefined, so the bus or signal can assume any value within the shaded area at that time. The actual level is unimportant and does not affect normal operation.

Preface

Clock

HIGH to LOW

Transient

HIGH/LOW to HIGH

Bus stable

Bus to high impedance

Bus change

High impedance to stable bus

Key to timing diagram conventions