Coprocessor Interface

4.5Connecting coprocessors

A coprocessor in an ARM7TDMI processor system must have 32-bit connections to:

•the instruction stream from memory

•data written by the core, MCR

•data read by the core, MRC.

The coprocessor can optionally have connections to:

•data written from memory, LDC

•data read to memory, STC.

This section describes:

•Connecting a single coprocessor

•Connecting multiple coprocessors on page 4-13.

4.5.1Connecting a single coprocessor

An example of how to connect:

•a coprocessor into an ARM7TDMI processor system if you are using a bidirectional bus is shown in Figure 4-5

•a coprocessor into an ARM7TDMI processor system if you are using a unidirectional bus is shown in Figure 4-6 on page 4-13.

ARM core

D[31:0] Memory

system

CPDRIVE

Coprocessor

Figure 4-5 Coprocessor connections with bidirectional bus

Coprocessor Interface

Figure 4-6 Coprocessor connections with unidirectional bus

The logic for Figure 4-6 is as follows:

on FALLING MCLK

ASEL = ((nMREQ = 1 and SEQ = 1) and (not nRW)) CSEL = ((nMREQ = 1 and SEQ = 1) and (nRW))

4.5.2Connecting multiple coprocessors

If you have multiple coprocessors in your system, connect the handshake signals as follows:

CPA and CPB

The individual CPA and CPB outputs from each coprocessor must be

ANDed together, and connected to the CPA and CPB inputs on the

ARM7TDMI processor.

You must multiplex the output data from the coprocessors.

Connecting multiple coprocessors is shown in Figure 4-7 on page 4-14.

Coprocessor Interface