Coprocessor Interface

4.4.6Coprocessor data operations

Coprocessor data operations, CDP instructions, perform processing operations on the data held in the coprocessor register bank. No information is transferred between the ARM7TDMI processor and the coprocessor as a result of this operation. An example sequence is shown in Figure 4-3.

MCLK

nCPI (from ARM)

CPA (from coprocessor)

CPB (from coprocessor)

Figure 4-3 Coprocessor data operation sequence

4.4.7Coprocessor load and store operations

The coprocessor load and store instructions are used to transfer data between a coprocessor and memory. They can be used to transfer either a single word of data, or a number of the coprocessor registers. There is no limit to the number of words of data that can be transferred by a single LDC or STC instruction, but by convention no more than 16 words should be transferred in a single instruction. An example sequence is shown in Figure 4-4 on page 4-11.

Note

If you transfer more than 16 words of data in a single instruction, the worst case interrupt latency of the ARM7TDMI processor increases.

Figure 4-4 Coprocessor load sequence