бакМИТ_КП2015 / Компоненты по вариантам / Операционные_усилители / LTC6084HMS8
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LTC6084/LTC6085
APPLICATIONS INFORMATION
SHDN Pins
Pins 5 and 6 are used for power shutdown of the LTC6084 in the DD package. If they are floating, internal current sources pull pins 5 and 6 to V+ and the amplifiers operate normally. In shutdown the amplifier output is high impedance, and each amplifier draws less than 1μA current. This feature allows the part to be used in muxed output applications as shown in Figure 3.
10k |
10k |
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5V |
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5V |
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LTC6084 |
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A |
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10k |
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(DD PACKAGE) |
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– |
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INA |
SHDN |
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A |
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10k |
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10k |
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OUT |
5V |
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10k |
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B |
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10k |
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– |
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INB |
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SEL = 5V, OUT = –INA |
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SEL = 0V, OUT = –INB |
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10k |
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5V |
SHDN |
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SEL |
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B |
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FAIRCHILD |
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NC7SZ04 OR |
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EQUIVALENT |
60845 F03 |
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Figure 3. Inverting Amplifier with Muxed Output
ESD
The LTC6084/LTC6085 has reverse-biased ESD protection diodes on all inputs and outputs as shown in the Simplified Schematic. If these pins are forced beyond either supply, unlimited current will flow through these diodes. If the current is transient and limited to 100mA or less, no damage to the device will occur.
The amplifier input bias current is the leakage current of these ESD diodes. This leakage is a function of the temperature and common mode voltage of the amplifier, as shown in the Typical Performance Characteristics.
Noise
In the frequency region above 1kHz, the LTC6084/LTC6085 shows good noise voltage performance. In this region, noisecanbedominatedbythetotalsourceresistanceofthe particular application. Specifically, these amplifiers exhibit the noise of a 58k resistor, meaning it is desirable to keep the source and feedback resistance at or below this value, i.e., RS + RG||RFB ≤ 58k. Above this total source impedance, the noise voltage is dominated by the resistors.
At low frequency, noise current can be estimated from the expression in = √2qIB, where q = 1.6 • 10–19 coulombs. Equating √4kTR f and R√2qIB f shows that for a source
resistor below 50GΩ the amplifier noise is dominated by the source resistance. Noise current rises with frequency. See the curve Input Noise Current vs Frequency in the Typical Performance Characteristics section.
60845fa
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LTC6084/LTC6085
SIMPLIFIED SCHEMATIC
Simplified Schematic of the Amplifier
V+
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R1 |
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R2 |
M10 |
M11 |
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M8 |
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I1 |
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C1 |
1μA |
I2 |
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V+ |
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– |
+ |
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V– |
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VBIAS |
M5 |
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A1 |
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D4 |
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V+ |
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+IN |
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D7 |
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V+ |
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D3 |
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M6 |
M7 |
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OUTPUT |
OUT |
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M1 |
M2 |
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CONTROL |
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V– D6 |
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V+ |
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D8 |
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–IN |
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V– |
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D2 |
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D5 |
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A2 |
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SHDN |
BIAS |
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V– |
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GENERATION |
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C2 |
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D1 |
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NOTE: SHDN IS ONLY AVAILABLE |
M3 |
M4 |
M9 |
V– IN THE DFN PACKAGE |
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R3 |
R4 |
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V– |
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60845 SS |
TYPICAL APPLICATIONS
Gain Selectable Amplifier
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5V |
VIN |
10k |
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A |
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– |
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SHDNA |
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4.02k |
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1k |
VOUT |
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10k |
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B |
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– |
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SHDNB |
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24.3k |
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1k |
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5V |
SEL = 5V, GAIN = 25 |
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SEL = 0V, GAIN = 5 |
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SEL |
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A, B: LTC6084 in DFN10 |
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FAIRCHILD NC7SZ04 OR EQUIVALENT
60845 TA02
60845fa
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LTC6084/LTC6085
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
0.675 ±0.05
3.50 ±0.05 |
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1.65 ±0.05 |
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2.15 ±0.05 |
(2 SIDES) |
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PACKAGE |
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OUTLINE |
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0.25 ± 0.05 |
0.50 |
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BSC |
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2.38 ±0.05 |
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(2 SIDES) |
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RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS |
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R = 0.115 |
0.38 ± 0.10 |
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TYP |
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10 |
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3.00 ±0.10 |
1.65 ± 0.10 |
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(4 SIDES) |
(2 SIDES) |
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PIN 1 |
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TOP MARK |
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(SEE NOTE 6) |
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(DD) DFN 1103 |
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5 |
1 |
0.200 REF |
0.75 ±0.05 |
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0.25 ± 0.05 |
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0.50 BSC |
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2.38 ±0.10 |
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0.00 – 0.05 |
(2 SIDES) |
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BOTTOM VIEW—EXPOSED PAD |
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NOTE:
1.DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2.DRAWING NOT TO SCALE
3.ALL DIMENSIONS ARE IN MILLIMETERS
4.DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5.EXPOSED PAD SHALL BE SOLDER PLATED
6.SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
60845fa
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LTC6084/LTC6085 |
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PACKAGE DESCRIPTION |
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DHC Package |
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16-Lead Plastic DFN (5mm × 3mm) |
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(Reference LTC DWG # 05-08-1706) |
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0.65 ±0.05 |
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3.50 ±0.05 |
1.65 ±0.05 |
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2.20 ±0.05 |
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(2 SIDES) |
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PACKAGE |
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OUTLINE |
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0.25 ± 0.05 |
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0.50 BSC |
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4.40 ±0.05 |
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(2 SIDES) |
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RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS |
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5.00 ±0.10 |
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R = 0.115 |
0.40 |
± 0.10 |
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TYP |
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(2 SIDES) |
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R = 0.20 |
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TYP |
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3.00 ±0.10 |
1.65 ± 0.10 |
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(2 SIDES) |
(2 SIDES) |
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PIN 1 |
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PIN 1 |
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TOP MARK |
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NOTCH |
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(SEE NOTE 6) |
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(DHC16) DFN 1103 |
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1 |
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0.200 REF |
0.75 ±0.05 |
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0.25 ± 0.05 |
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0.50 BSC |
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4.40 ±0.10 |
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0.00 – 0.05 |
(2 SIDES) |
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BOTTOM VIEW—EXPOSED PAD |
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NOTE:
1.DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229
2.DRAWING NOT TO SCALE
3.ALL DIMENSIONS ARE IN MILLIMETERS
4.DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5.EXPOSED PAD SHALL BE SOLDER PLATED
6.SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
60845fa
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LTC6084/LTC6085
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 ± 0.127
(.035 ± .005)
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5.23 |
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3.20 – 3.45 |
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(.206) |
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(.126 – .136) |
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MIN |
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3.00 ± 0.102 |
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0.52 |
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0.42 ± 0.038 |
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0.65 |
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(.118 ± .004) |
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(NOTE 3) |
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(.0205) |
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(.0165 ± .0015) |
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(.0256) |
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TYP |
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BSC |
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REF |
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RECOMMENDED SOLDER PAD LAYOUT |
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3.00 ± |
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0.102 |
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4.90 ± 0.152 |
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DETAIL “A” |
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(.118 ± .004) |
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0.254 |
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(.193 ± .006) |
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(NOTE 4) |
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GAUGE PLANE |
(.010) |
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0° – 6° TYP |
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0.53 ± 0.152 |
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1.10 |
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0.86 |
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(.021 ± |
.006) |
(.043) |
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(.034) |
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DETAIL “A” |
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MAX |
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REF |
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0.18 |
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(.007) |
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SEATING |
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PLANE |
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0.22 – 0.38 |
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0.1016 ± 0.0508 |
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(.009 – .015) |
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(.004 ± .002) |
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0.65 |
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TYP |
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MSOP (MS8) 0307 REV F |
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(.0256) |
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BSC |
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1. DIMENSIONS IN MILLIMETER/(INCH) |
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2.DRAWING NOT TO SCALE
3.DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4.DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5.LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
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.045 ± .005 |
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.254 MIN |
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.150 – .165 |
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.0165 ± .0015 |
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.0250 BSC |
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RECOMMENDED SOLDER PAD LAYOUT |
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.015 ± .004 |
× 45° |
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(0.38 ± 0.10) |
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.007 – .0098 |
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0° – 8° TYP |
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(0.178 – 0.249) |
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.016 – .050 |
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(0.406 – 1.270) |
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NOTE: |
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1. CONTROLLING DIMENSION: INCHES |
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2. DIMENSIONS ARE IN |
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INCHES |
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(MILLIMETERS) |
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3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
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.189 – .196* |
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(4.801 – 4.978) |
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.009 |
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16 |
15 |
14 |
13 |
12 |
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10 9 |
(0.229) |
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REF |
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.229 |
– .244 |
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.150 – .157** |
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(5.817 |
– 6.198) |
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(3.810 – 3.988) |
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1 |
2 |
3 |
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6 |
7 |
8 |
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.0532 |
– .0688 |
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.004 – .0098 |
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(1.35 |
– 1.75) |
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(0.102 – 0.249) |
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.008 |
– .012 |
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.0250 |
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GN16 (SSOP) 0204 |
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(0.203 |
– 0.305) |
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(0.635) |
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TYP |
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BSC |
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|||||
60845fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. |
15 |
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- |
|
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. |
LTC6084/LTC6085
TYPICAL APPLICATION
Bipolar Analog Isolation Amplifier
VCC
1M |
|
10pF |
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1% |
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OC1 |
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1M |
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VCC |
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3pF |
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OC1 |
– |
2k |
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VIN |
+ |
1/2 LTC6084 |
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+5V |
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OC1 |
– |
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VOUT = VIN |
||
1M |
|
10pF |
OC2 |
+ |
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LTC6240HV |
|||
1% |
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–5V |
|
OC2 |
– 1/2 LTC6084 |
GNDB |
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+ |
2k |
BW ≈ 40kHz, EITHER POLARITY |
||
GNDA |
|
LARGE SIGNAL TRANSITION DELAY ≈ 50μs |
|||
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||||
|
|
OC2 |
SMALL SIGNAL DEAD ZONE: |VIN| ≤ 10mV |
||
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|
VCC = 5V, |
|
OC1, OC2: AVAGO TECHNOLOGIES HCNR201 |
VOUT = ±5V, |
||
VIN = ±5V |
|
www.avagotech.com |
|
RELATIVE TO GNDB |
|
RELATIVE TO GNDA
60845 TA03
RELATED PARTS
PART NUMBER |
DESCRIPTION |
COMMENTS |
|
|
|
LTC6078/LTC6079 |
Dual/Quad Micropower Precision Rail-to-Rail Op Amps |
25μV VOS(MAX), 0.7μV/°C VOS Drift(MAX), 1pA IBIAS(MAX) |
LTC6081/LTC6082 |
Dual/Quad Precision Rail-to-Rail Input/Output Amps |
70μV VOS(MAX), 0.8μV/°C VOS Drift(MAX), 1pA IBIAS(MAX) |
LTC6087/LTC6088 |
Dual/Quad 14MHz Rail-to-Rail Input/Output Amps |
750μV VOS(MAX), 5μV/°C VOS Drift(MAX), 1pA IBIAS |
LTC6240/LTC6241/ |
Single/Dual/Quad Low Noise Rail-to-Rail Output Op Amps |
7nV/√Hz Noise, 0.2pA IBIAS, 18MHz Gain Bandwidth |
LTC6242 |
|
|
LTC6244 |
Dual Low Noise Rail-to-Rail Output Op Amps |
8nV/√Hz Noise, 1pA IBIAS, 50MHz Gain Bandwidth |
16 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
60845fa
LT 0209 REV A • PRINTED IN USA
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com |
♥ LINEAR TECHNOLOGY CORPORATION 2008 |