Книги+1 / 2013 [Chandan_Kumar_Sarkar]_Technology_CAD

Accumulation

p

Energy band diagram for ideal MOS capacitor under the application of applied voltage.

is the applied voltage. The difference between the Fermi level in the metal and the semiconductor is the applied bias.

Because Φm and ΦS do not change with applied voltage, but EFm moves up relative to EFS, causing a tilt in the oxide conduction band, the energy bands of the semiconductor bend near the interface (the valence bands are bent to come closer to the Fermi level) accommodating the accumulation of holes at the interface as in Figure 2.27. The effect of depositing a negative charge in the gate of a MOS transistor causes hole accumulation.

An increase in surface hole concentration implies an increase in Ei −EF at the surface. Because the Fermi level within the semiconductor remains unchanged as no current flows though the MOS structure with increasing (Ei −EF), Ei must move up in the energy near the surface. This results in band bending near the surface. From Figure 2.27 it is clear that near the surface the Fermi level lies closer to the valence band, creating a larger hole concentration than that arising from the doping of the p-type semiconductor.

2.14.2  Depletion

When a positive bias is applied to the metal, positive charges are deposited on the metal and a corresponding net negative charge accumulates at the semiconductor surface. Such a negative charge in the p-type material is due to depletion of holes from the surface, leaving behind the uncompensated ionized acceptors. Thus the hole concentration decreases, moving Ei closer to EF, bending the band down near the semiconductor surface as in Figure 2.28. If the positive voltage is increased, the band bends down more

FIGURE 2.28

Effect of applied electric field on the interface charge density in the ideal MOS capacitor: positive gate voltage (VG) creates a depletion region.

strongly, resulting in inversion that occurs for the higher positive applied positive gate bias [39].

2.14.3  Inversion

If the positive bias on the metal side is increased further, the bands at the semiconductor surface bend down more strongly as shown in Figure 2.29. A large positive voltage can bend Ei below EF . Thus the conduction band at the oxidesemiconductor region comes close to the Fermi level in the semiconductor. This reverses the mobile charges from holes to electrons at the interface and the electron density increases. If the positive bias is increased until EC comes close to the electron quasi-Fermi level near the interface, the electron density increases and the semiconductor near the interface has electrical properties of an n-type semiconductor. This n-type surface layer is formed not by doping, but by inversion of the original p-type semiconductor due to the applied bias. This inverted layer is separated by the underlying p-type material by a depletion region.

2.14.4 Surface Potential

Figure 2.30 shows the band bending of the semiconductor on the onset of strong inversion [37–39]. It is described by the quantity Φ (x) , which measures the position of the intrinsic Fermi level with respect to the bulk intrinsic Fermi level. The band bending at the oxide-semiconductor interface is described in terms of the potential ΦS as in Figure 2.30. We notice that ΦS = 0 is the flat band condition for the MOS (Figure 2.26). When ΦS < 0 , the

FIGURE 2.29

Band bending with increase of positive bias on the metal side of MOSFET.

At inversion

ΦS = 2ΦF

EC

Ei

qΦF

Surface

potential qΦs EF

EV

eΦF = EF – Ei Positive for p-substrate Negative for n-substrate

Oxide Semiconductor

Z

FIGURE 2.30

Band bending of the semiconductor in the inversion mode.

bands bend up at the surface and holes accumulate. Similarly when ΦS > 0, depletion takes place, and finally when ΦS > 0 and greater than ΦF , the bands bend in such a way that Ei lies below EF, resulting in inversion.

The onset of inversion is a gradual process and is a function of gate bias. The strong inversion occurs when the electron concentration at the interface is equal to the bulk p-type concentration. Strong inversion means the surface will be as strongly n-type as p-type. So the intrinsic level Ei is at a position ΦF below the Fermi level at the interface. The surface band bending is given in (2.91) as

ΦS is required for inversion. For a p-MOSFET the substrate is n-type and ΦF is negative, causing inversion.

The charge density of the metal Qm is balanced by the channel depletion charge Qd and the inversion charge Qn. We are interested in calculating the threshold voltage (i.e., the gate voltage needed to cause inversion in the channel).

The total surface charge density is related to the surface field by Gauss’s law. This charge QS is the total surface charge density at the semiconductoroxide interface region and includes the induced free charge in inversion and the background ionic charge. The charge QS is zero when the bands are flat.

For a larger positive gate voltage the surface potential increases. The hole concentration near the surface decreases while the electron concentration increases, according to the following relationships:

The electron surface concentration is equal to that of hole (n(0) = p(0) = ni), when Ei coincides with EF at x = 0. This happens when

as shown in Figure 2.31.

With further increase in the gate voltage, the electron surface concentration increases up to a point where n(x = 0) becomes equal to ppo = Na which is the original hole concentration in the substrate. This is because the band curvature at the surface (x = 0) places Ei at an energy qΦF below EF. In other words, the band curvature is equal to 2(Ei – EF) or ΦS = 2ΦF.

When this condition is met, the semiconductor surface is said to be in strong inversion.

For ΦF ≤ ΦS ≤ 2ΦF, the electron concentration is larger than the hole concentration, and the surface is in weak inversion, while for ΦS ≥ 2ΦF it is in strong inversion as shown in Figure 2.32. The inversion layer is rich in electrons and hence is a good conductor. The MOS capacitor consists of two conducting electrodes (the metal gate and the inversion layer at the silicon surface). As in the case of accumulation, the capacitance of the MOS structure is again

equal to Cox.

When an inversion layer is formed, electrons are the local majority carriers at the surface. Any subsequent increase in gate voltage increases the electron concentration in the inversion layer and produces a larger inversion charge Qinv. However, the thickness of the inversion layer remains very small. Its actual thickness is similar to that of an accumulation layer.

FIGURE 2.31

Hole and electron concentration as a function of surface potential.

FIGURE 2.34

Energy band diagram of MOSFET when (a) the metal and the semiconductor are taken separately, (b) no bias is applied, and (c) a bias equal to Φms is applied to the gate.

2.15.2 Oxide Charges

Oxides grown on silicon contain positive charges due to the presence of contaminating metallic ions or imperfect Si-oxide bonds [40]. These charges can either be fixed or mobile in the oxide. However, for simplicity only the case of fixed charges is considered.

Let us consider an elementary real positive charge Q(Coulomb m–2) at a depth x in the oxide. Let x = 0 be defined at the metal/oxide interface as shown in Figure 2.35(a). Negative charges will appear in the metal and the silicon. The sum of these three charges is equal to zero. The charge in the silicon can be removed when an appropriate negative bias is applied to the gate as in Figure 2.35(b). If the charge is closer to the semiconductor, a larger compensation gate bias is required to remove it. In an actual device, charges