Vankka J. - Digital Synthesizers and Transmitters for Software Radio (2000)(en)

356

Common centroid; 182, 183, 186 Hierarchical symmetrical switching;

182

INL-bounded; 182

Random walk; 182

Row-column switching; 182

Current switch; 189, 199, 207, 208, 209,

211, 213

D

D/A converter; 177, 187, 193, 259, 262,

271, 279, 283, 297, 319, 320

Binary architecture; 194

Segmented architecture; 196

Unary architecture; 195

D/A converter static non-linearity Differential Non-Linearity (DNL);

177, 178, 181, 195, 196, 284, 286, 293, 316, 320

Integral Non-Linearity (INL); 177,

178, 179, 180, 181, 182, 184, 284, 286, 293, 316, 320

Delta Sigma (∆Σ) modulator; 5, 269, 270, 274, 275, 276, 277

Design Rule Check (DRC); 317

Digital Enhanced Cordless

Telecommunications (DECT); 4 Digital IF modulator; 279, 297

Digital Signal Processing (DSP); 7, 9, 11,

12, 13, 35, 36, 38, 39, 41, 53, 239

Direct Digital Synthesizer (DDS); 61, 62,

63, 64, 65, 68, 97, 99, 102, 103, 104, 106, 108, 109, 110, 113, 114, 115, 116, 117, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132,

134, 135, 139, 140, 143, 145, 155,

160, 165, 167, 188, 269, 270, 271,

273, 274, 276, 277

Dither; 113, 114, 116, 119, 120, 121, 122,

123, 124, 135, 271

Non-subtractive dither; 116

Index

Subtractive dither; 122

Dummy loads; 208

Dynamic biasing; 30

Dynamic element matching; 183

E

Enhanced Data Rates for GSM Evolution (EDGE); 9, 248, 292, 294, 297, 298,

300, 301, 302, 303, 305, 306, 307,

309, 317, 318, 320, 321, 322, 339, 340, 341, 342, 344, 345, 346

Error Feedback (EF); 114, 124, 125, 126,

127, 128, 129, 130, 131, 132, 133, 134, 135

European Teleommunications Standards

Institute (ETSI); 297

F

Farrow structure; 241, 243, 245, 246, 251, 308

Finite Impulse Response (FIR) filter; 5,

68, 223, 224, 225, 226, 227, 230, 231,

245, 246, 264, 265, 327, 328, 331,

332, 334, 336, 337, 353, 354 Direct form structure; 223 Hybrid form; 225

Transposed direct form structure; 224

G

Gaussian Minimum Shift Keying (GMSK); 5, 6, 297, 298, 302, 309,

317, 339

General Packet Radio Service (GPRS);

297

Global System for Mobile communication; 5, 6, 239, 248, 294,

297, 298, 299, 300, 302, 305, 306,

307, 309, 318, 320, 321, 322, 339,

340, 341, 342, 343, 344, 345, 346

Index

H

Half band filters; 68, 231, 332 Hewlett Packard's HP-35; 81 High-Speed Circuit Switched Data

(HSCSD); 297 Hilbert transformer; 275

Horner's method; 159, 245

I

Intel 8087; 81

Inter-Modulation Distortion (IMD); 8, 26,

29, 33, 34, 39

Interpolation

B-spline interpolation; 246

Lagrange interpolation; 242, 243, 246,

353

Inter-Symbol Interference (ISI); 68, 219,

220, 221, 222, 223

L

Layout Versus Schematic (LVS); 317

Least Mean Squares Algorithm (LMS);

53, 56, 57

Logic Elements (LEs); 134, 259, 266, 276 Look-Up Table (LUT); 37, 39, 40, 57,

149, 310

M

Matlab; 132, 134, 167, 266, 267, 314

Modelsim; 314, 315

N

Newton-Rhapson algorithm; 53, 55 Noise Transfer Function (NTF); 274 Numerically Controlled Oscillator

(NCO); 61, 86, 250, 251, 252, 279,

307, 308, 309

Nyquist frequency; 113, 122, 124, 193,

204, 269, 271, 321, 322

357

O

On-chip capacitor; 286, 292

P

Parks-McClellan algorithm; 266

Peak to Average Ratio (PAR); 327, 339,

340

Phase accumulator; 62, 139

Phase Shift Keying (PSK); 317, 339 Phase to amplitude converter; 62, 143

Angle Decomposition; 150

COordinate Rotation Digital Computer

(CORDIC); 164 Difference algorithm; 147 Nicholas architecture; 153 Nonlinear D/A converter; 145 Polynomial approximations

Chebyshev Approximation; 161

High Order Piecewise

Interpolation; 158

Legendre Approximation; 163

Piecewiese Linear Interpolation;

156

Taylor Series Approximation; 160 Polynomial Approximations; 155 Splitting into Coarse and Fine LUTs;

149

Sunderland architecture; 152 Pipelining; 140, 195, 224, 227, 230, 234 Pipelining/Interleaving (P/I); 234 Polyphase decomposition; 230, 239, 281,

285, 307

Power Amplifier (PA); 4, 25

Class-A; 340

Class-C; 7, 9, 31

Class-D; 7, 17, 18

Class-E; 7, 16

Class-F; 7

Class-S; 9

Power amplifier linearization techniques Analog predistortion; 33

358

Cartesian feedback; 29, 35 Complex gain predistortion; 36, 38 Data predistorters; 41 Feedforward; 25

Mapping Predistortion; 35

Polar predistortion; 38

RF-predistortion; 39

Programmable Logic Device (PLD); 259,

276

Progression-of-states technique; 140 Pulse shapes

double complementary pulse (RZ2c); 263

double RZ pulse (RZ2); 263 Non-Return-Zero (NRZ); 259, 262,

264, 265

Return-to-Zero pulse (RZ); 262 Pulse shaping filter; 68, 219, 220, 299,

300, 302, 304, 305, 306, 307, 309, 312, 328, 332

Pulse Width Modulation (PWM)

techniques; 15

Q

Quadrature Amplitude Modulation (QAM); 25, 33, 65, 66, 67, 81, 85,

271, 298, 304

Quadrature Direct Digital Synthesizer

(QDDS); 66, 165, 312, 313

Quadrature modulator; 3, 11, 12, 29, 34,

35, 49, 50, 52, 55, 67, 279, 280, 281,

282, 285, 293, 294, 295 Quadrature Modulator Compensator

(QMC); 50

Quadrature modulator errors compensation

Asymmetric compensation method; 56 Symmetric compensation; 53

R

Ramp generator; 309, 310

Index

Register Transfer Level (RTL)

description; 314

Re-sampler; 68, 239, 305, 307, 308 Residue Number System (RNS); 141 Root raised cosine filter; 306, 332

S

Short Message Services (SMS); 297 Signal quality

Error Vector Magnitude (EVM); 7,

220, 294, 303, 305, 306, 308, 320,

321, 322, 327, 330, 332, 333, 334,

335, 336, 337, 342, 344, 345, 346

Peak Code Domain Error (PCDE);

305, 327, 332, 334, 335, 336, 337 Signal to Noise and Distortion (SNDR);

261

Signal to Noise and Distortion ratio (SNDR); 188, 189

Signal-to-Noise Ratio (SNR); 37, 188

Spurious Free Dynamic Range (SFDR);

185, 188, 192, 269, 271, 273, 316, 321

Subexpression sharing method; 224

Synopsys; 314

Synthesis filter bank; 312

T

Thermometer coded; 283, 319

Time Division Multiple Access (TDMA);

4, 300

Total Harmonic Distortion (THD); 188

Transmitters

Combined Analogue Locked Loop

Universal Modulator (CALLUM);

14

Direct conversion transmitters; 1 Dual-conversion transmitter; 3 Envelope Elimination and Restoration

(ERR); 6

LInear amplification employing Sampling Techniques (LIST); 15

Index

Linear Amplification with Nonlinear Components (LINC); 10

Offset-PLL; 6

Polar-loop transmitter; 9

Transmitters Based on Bandpass Delta-Sigma Modulator; 17

VCO modulator; 4

Vector Locked-Loop (VLO); 15

V,W

Vandermonde matrix; 354

VERILOG; 315

Very High Speed Integrated Circuit HDL

(VHDL) description; 285

359

Very Large Scale Integration (VLSI); 81,

246

Wideband Code Division Multiple

Access (WCDMA); 239, 248, 259,

261, 264, 266, 267, 292, 294, 297, 298, 304, 305, 306, 309, 310, 319,

320, 321, 322, 327, 332

Wiener model; 32

Windows

Blackman window; 298, 310, 311,

312, 342, 344

Hamming window; 298, 336, 342 Hanning window; 298, 310, 311, 342,

344

Volterra kernels; 31