ЛЕКЦИИ ФШФС_2007 / НАШИ СТАТЬИ / JCTE223_Lyblin_РЭ_2002

INTRODUCTION

Recent years stimulated an interest in the development and practical application of position detectors of charged particles and X-rays using the semiinsulating gallium arsenide (i-GaAs) [1]. This interest is caused by a higher radiation resistance of i-GaAs as compared to silicon, its higher sensitivity to X-rays (because of a heavier atomic mass), and also a possibility of creating monolithically integrated devices on i-GaAs substrates. Such devices comprise the detector itself and a highspeed signal processing circuit. The main problem in the development of the i-GaAs detectors is a high level of intrinsic noise and, first of all, the level of excess noise including the generation–recombination (GR) noise and the 1/fγ (flicker) noise [2].

In this work, we investigate the electric noise in Al/i-GaAs barrier structures used in manufacturing position detectors. The main purpose is to select the detector material that provides the lowest level of excess noise.

1. SAMPLES

AND EXPERIMENTAL TECHNIQUE

We studied two groups of test barrier structures. The Shottky contacts were obtained for both groups of samples by the successive vacuum deposition of vanadium (of thickness d = 10–20 nm) and aluminium (d = 300 nm) layers on the GaAs surface preprocessed with oxygen plasma and a 5% solution of HCl. At the reverse side of the plate, an ohmic contact was formed of a AuGe alloy (88% Au : 12% Ge) of thickness 100−300 nm, which was superposed by a 30to 40 nmnickel layer.

The first group of samples included the Shottky-bar- rier test structures 1, 2, 3, and 4 shown in Figs. 1a and 1b. For these samples, the area of the Shottky contact

was l × h = 0.75 × 0.75 mm2 . Samples 4 differed from the others in that their Shottky contacts were formed on a high-resistance (ρ ≈ 2 × 105 Ω cm) epitaxial n-type GaAs layer of thickness d1 = 40 µm which was grown by the chloride epitaxy from the gas phase [3] on a n+-GaAs substrate of thickness d2 = 400 µm with impurity concentration n = 2 × 1018 cm–3 (see Fig. 1b).

The second group comprised samples 1', 2', and 3' with a Shottky contact area of 5 × 5 mm2 and outrigger contact areas formed on a thick SiO2 layer. The latter contact areas are used to insert the barrier structure into an integrated circuit (IC). The design of these samples is shown in Fig. 1c.

The plates for samples 1 and 1' were cut from an ingot of the single-crystal gallium arsenide grown by the Czochralski method [3] and doped with chromium in the process of growth. The plates for samples 2, 3, and 2', 3' were not subjected to a special doping in the process of growth. Samples 2 and 3, and also 2' and 3', differed in that they were obtained from different manufacturers. The specific resistance of the plate material exceeded 107 Ω cm. The plate thickness varied from 500 to 600 µm.

To measure the excess noise, a bias voltage was applied to the structure under study from a precision power source through a 10 MΩ resistor. The noise in the barrier structure was amplified by a low-noise preamplifier designed on a 2P303A field-effect transistor and then directed to a Ya4S-68 spectrum analyzer. The intrinsic noise of the preamplifier at 20 Hz was less than 10–14 V2/ Hz under no-load conditions, and was less than 10–17 V2/Hz under short-circuit conditions. These values are much less than the noise level of the barrier structures under study. The spectral density of the noise power (SDP) was investigated in a frequently

h

l

d

i - GaAs

AuGeNi

(c)

VAl

SiO2

VAl

i - GaAs

Figure 2 shows the reverse branch of CVCs obtained for the samples of the first group at the temperature T = 296 K (the numbers of curves correspond to those of the samples). For the epitaxial-layer samples shown in Fig. 1b, the voltage U ≈ (–130 to –150) V across the barrier structure causes a disruptive discharge (see Fig. 2b).

To analyze mechanisms of electrical conductance in the samples shown in Fig. 1a, the CVCs of the barrier structures were plotted in various coordinates {f( j ), ϕ (E)}, where j is current density and E is the intensity of electric field [4]. The analysis has shown that, in the region of the reverse branches of CVCs, the structures under study demonstrate different mechanisms of conductivity depending on the bias voltage and temperature.

The bias voltages ranging from zero to –300 V (region I in Fig. 2a) correspond to the mechanism of self-conductance in i-GaAs.

In strong fields and voltages ranging from –300 to −700 V, we observed the Pool–Frenkel conductivity (region II in Fig. 2a). This conductivity is related to the thermal ionization of impurity donor centers facilitated by the electric field. This fact is confirmed by the linear behavior of the CVC plotted in the “Shottky” coordi-

nates {lnj, E }.

The samples had a large thickness of the spacecharge region (SCR). As a result, in stronger fields and bias voltages U ranging from –700 to –1000 V, we observed the conductivity caused by a multistep tunneling of charge carriers into the conductance band through traps in the semiconductor bandgap (region III in Fig. 2a). This fact is confirmed by the linear behavior

AuGeNi SiO2

Fig. 1. Schematic drawing of test structures: (a) samples 1, 2, and 3; (b) sample 4; and (c) samples 1', 2', and 3'.

The excess noise in barrier structures was investigated for the region of self-conductance. At high temperatures, the conductivity of a semiconductor is mainly caused by the intrinsic charge carriers and other mechanisms of conductivity are masked by the selfconductance.

range of 20 Hz–60 kHz at both forward and reverse bias voltages of up to ±120 V.

To clarify mechanisms of electrical conductivity, current–voltage curves (CVCs) of the barrier structures were measured in a wide range of both forward and reverse bias voltages (up to ±1000 V) for the temperature range T = 296–386 K. When the semiconductor diodes are used as elements of the position detectors, they operate at a reverse bias voltage. Therefore, the paper mainly presents results for CVC, and excess noise obtained in this operating mode.

All barrier structures depicted in Figs. 1a–1c show, at both forward and reverse biases, a high level of excess noise with the 1/fγ spectrum, which can be explained by a great number of defect centers creating trap levels with a large set of activation energies in the bandgap of the semiconductor. It is well known (see [2]) that, in the case of one trap level in the bandgap, the frequency dependence of the noise SDP, has a Lorentz spectrum with the cutoff frequency f1 corresponding to the relaxation time τ , which is determined by the capture and emission time constants for carriers in the trap level; so that f1 = 1/2πτ . The superposition of a great

number of GR spectra leads to the spectrum 1/fγ [2]. For the samples of barrier structures shown in Figs. 1a and 1b the Lorentz spectrum of the excess noise was not observed, which can be explained by a high concentration of impurities and defects in the i-GaAs causing a wide distribution of relaxation times.

Figure 3a demonstrates frequency dependences of the excess noise SDPs for samples 1, 2, 3, and 4 of the first group. The results were obtained at the reverse bias U = –110 V. Curve 1: sample 1, the spectrum form factor γ = 1.87; curve 2: sample 2, γ = 1.63; curve 3: sample 3, γ = 1.59; and curve 4: sample 4, γ = 2.60. The structures with the epitaxial layer (curve 4 in Fig. 3a) demonstrates the highest noise level. At lower voltages across the structure, we observed lesser values of the factor γ . For example, structure 2 with U = –10 V has the form factor γ = 1.16. When the temperature rises from room temperature to T = 386 K, γ increases up to 1.32.

At the reverse bias voltage U = –110 V, the spectrum form factor is γ ≈ 1.5–2.6 for different types of samples.

Figure 3b demonstrates the excess-noise SDP obtained at U = –32 V for structures 1', 2', and 3' shown

in Fig. 1c. Structures 3' produced by a developed technique have the lowest noise level with a Lorentz spectrum and the cutoff frequency f1 ≈ 100 Hz (Fig. 3b, curve 3').

The noise level was higher in the structures formed on the plates of the high-resistance chromium-doped i-GaAs as compared to those prepared on the i-GaAs plates without a special doping, for both the first and the second group of the samples. Such a result can be explained by the formation of additional trap levels created by the doping impurity in the semiconductor bandgap.

It should be noted that, up to bias voltages of −110 V, the reverse CVCs of structures 1, 2, and 3 were practically identical (Fig. 2a), while the levels of excess noise at 20 Hz differed by about an order of magnitude (Fig. 3a). The CVCs begin to differ only at bias voltages U ≈ 500 to 1000 V (Fig. 2a). This result indicates the high informativeness of the excess-noise technique in detecting defects in the semiconductor lattice and also in the Al//i-GaAs interface. Therefore, the technique used to measure the excess noise in various types of heterostructures can be used for the nondestructive

f, Hz

Fig. 4. Frequency characteristics of the noise SDP for different types of samples at the forward bias: (a) structures in Figs. 1a and 1b (curves 1, 2, and 3 are for structures 1, 2, and 3, respectively) with U = 110 V and (b) structures in Fig. 1c (curves 1', 2', and 3' are for structures 1', 2', and 3', respectively) with U = 32 V.

quality control of semiconductor devices and ICs designed on their basis at the stage of manufacture (using test structures) and, later, for the control of finished products.

The excess noise level is much higher at the forward bias than at the reverse one (by about four–five orders of magnitude at 20 Hz). The high noise level at the forward bias can be explained by fluctuations of the Shottky barrier’s height [5, 6]. The modulation of height of potential barriers is often used to explain the 1/f noise in many physical systems, for example, in MIS structures operating under the conditions of local occupation and release of traps in the bulk of oxide during the tunneling transport of carriers through the dielectric [7, 8]. As applied to Shottky barriers, such fluctuations can be related to the migration of trap centers either at the metal–GaAs interface [7] or in the space-charge region of semiconductor. With a low quality of the contact, this type of fluctuations may be dominating.

Figure 4 demonstrates the frequency characteristics of the excess noise SDP obtained at the forward bias U = 110 V for the samples of the first (Fig. 4a) and the second (Fig. 4b) groups. The corresponding form fac-

tors γ are: sample 1, γ = 3.74 (curve 1, Fig. 4a); and sample 2, γ = 2.81 (curve 2, Fig. 4a); and sample 3, γ = 2.86 (curve 3, Fig. 4a).

At the forward bias applied to a barrier structure, the form factor γ is higher than at the reverse one. In this mode, a component of the nonequilibrium flicker noise with the form factor γ ≈ 3–4 was observed. An excess noise component with spectrum 1/f3 was also observed in [9] in Shottky-barrier structures based on semiinsulating GaAs. However, the mechanism leading to such a type of spectrum remains unclear. The generation of the nonequilibrium flicker noise can be related to nonequilibrium fluctuations of the barrier-structure capacitance formed at the metal–semiconductor interface. These fluctuations may be caused by the migration of trap centers in the electric field. This assumption is confirmed by the following experimental result: the spectrum form factor γ increases with electric field and temperature.

CONCLUSION

The investigations of excess noise in the Al/i-Ga As barrier structures, manufactured on various substrates have shown that the structures prepared on epitaxial layers of GaAs demonstrate a higher noise level as compared to that of the structures prepared on plates of i-GaAs grown by the Czochralski method. The structures formed on the chromium-doped i-GaAs plates demonstrate a higher noise level as compared to the samples made on plates of the nondoped gallium arsenide. An excess-noise component with the spectrum 1/fγ and the form factor γ ≈ 3–4 was found. The physical mechanism of this noise component can be related to nonequilibrium fluctuations of the barrier structure capacitance at the metal–semiconductor boundary.

The method of measuring the excess noise can be recommended for the nondestructive quality control of semiconductor devices and ICs based on barrier structures, both at the stage of manufacture (using test structures) and later, for the control of the finished products.

ACKNOWLEDGMENTS

The work was supported by the Integratsiya Federal Program (projects 133 and AO 155).

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