ЛЕКЦИИ ФШФС_2007 / НАШИ СТАТЬИ / JCTE1301_MOS 1999

This result can be explained using the model of the electron interaction through the metal–dielectric interface. The existence of the oxide traps is provided, to a great extent, by the presence of the excess silicon atoms (oxygen vacancies) [7, 46]. One of the reasons for the formation of the oxygen vacancies in the vicinity of the metal–dielectric interface is the extraction of the oxygen ions from SiO2 by the aluminum gate. The traps formed on the interface can exchange the charge carriers with the gate. When the gate is made of Mo or n+Si*, the oxygen vacancies are not formed because these materials weakly interact with SiO2 . This effect provides a lower-level excess noise in the structures with the Mo and n+Si* gates than in the structures with the Al gate. In the range of field intensities 2−10 MV/cm, the VCCs of the MDS capacitors with the Mo gate correspond to the Schottky over-the-barrier emission, while the VCCs of the capacitors with the Al gate correspond to the Poole–Frenkel mechanism [9], which indicates a higher trap density in the dielectric near the Me–SiO2 interface in the structures with the Al gate. The existence of the effects described above is corroborated by the results [47], where the charge degradation of the MDS capacitors with the polysilicon and aluminum gates is investigated. These structures are fabricated on the KEF-4.5 n-type plates with the crystallographic orientation (100) in a single production cycle. When equal charges are injected from the silicon into the dielectric (the Fowler–Nordheim injection) in the dc mode, the positive charge accumulated in the dielectric in the Si–SiO2–Al structures is much greater than the charge accumulated in the Si–SiO2– n+Si* structures.

When the structure voltages approach the breakdown values, the noise behavior substantially changes. The character of the noise observed with the oscilloscope corresponds to the burst noise [8, 9], which manifests itself as an RTS followed by the irreversible dielectric breakdown. Apparently, the excess noise is initiated by other processes, such as the ion drift or migration of the trap centers in the presence of highintensity fields and the formation of new traps.

The generation of the burst noise in the MDS structures also precedes the breakdown of the ultrathin dielectric (hox ≈ 2–5 nm) [19]. This kind of noise may be attributed to physical mechanisms of the structure damage.

For a great number of structures (N = 200) with approximately equal leakage currents, substantial differences (by several orders of magnitude) are observed in the 1/f noise level in [8]. Thus, for the structures with the leakage currents I = (1 ± 0.5) nA, the SDs of the excess noise power differ by six orders of magnitude when the electric field intensity in the dielectric is 6 × 106 V/cm and take values in the range from 10–29 to 10−23 A2 /Hz. For the structures with the leakage currents I = (10–2–10–1) nA, the noise level spread is four orders of magnitude (from 10–29 to 10–25 A2 /Hz). In [8], a model is proposed to explain the noise level spread for the structures with equal leakage currents. This model is presented in Fig. 10, which shows two structures with equal leakage currents (Ia = Ib) measured at the equal structure voltages but with different number of the local conductivity channels. It is assumed that the leakage currents flow mainly in the local channels, and the SD of the noise power of the local jth interval Sj is propor-

tional to squared current Ij in this interval, i.e., Sj = K I2j , where K is the proportionality factor [8].

In the case illustrated by Fig. 10a, salient regions with defects are absent, and leakage currents I1, I2, …, In flow in the homogeneous local regions. For this MDS structure, the SD of the current fluctuations (S‡) is formed of the SDs of the noise power of n independent channels and can be specified by the formula

In the case illustrated by Fig. 10b, the dielectric contains a region with defects, and the leakage current Ib =

One can see from (9) and (10) that Sb > Sa (n ≥ 2). When all local currents Ij (Fig. 10a) are assumed to be

equal, Sa = Kn I2j . When the local current exists in the dielectric (Fig. 10b), Ib = nIj and the SD of the noise

power is given by Sb = Kn2 I2j = nSa. Hence, the model

with the high local leakage currents is characterized by a higher-level excess noise. Evidently, the structure with the defect shown in Fig. 10b is potentially unreliable. When the dielectric breakdown occurs, the current is also localized on a small area of the structure, which causes a considerable increase of the noise [22].

The Character of the LF Noise in the MDS Structures with an Ultrathin Oxide Layer

When studying the noise in the MDS capacitors with the ultrathin dielectric (hox 2–10 nm) [19–22], one should keep in mind that the ultrathin dielectric is transparent for tunneling electrons. Therefore, in the ultrathin SiO2 layers of the structures operating in the presence of high-intensity electric fields, the conductivity is due either to the direct tunneling through the SiO2 bandgap or to the oxide traps, which facilitate the tunneling process (the multistage tunneling). One of the standard tests for the reliability of the structure involves treating the structure with given tunnel current IT [19– 21]. The gate or substrate electrons are injected into the oxide conductivity region using the Fowler–Nordheim tunneling mechanism [7]. Usually, when evaluating the reliability, the time period after which the irreversible

dielectric breakdown occurs is determined. Depending on the value of given current IT (or gate voltage U), the time of the dielectric damage may vary from tens of seconds to several hours. When testing the dielectric for the reliability, the structure voltage and tunnel current fluctuations are measured during the time interval ts of the current load treatment. Figure 11 illustrates the breakdown developing in the n+Si*–SiO2(3.9 nm)–pSi structure during the time when the tunnel current of different density is injected from the gate into the dielectric [21]. After the beginning of the carrier injection, a soft breakdown (Soft BD) develops, which corresponds to a small voltage drop in Fig. 11a. Then, after a certain time delay and until the moment when the thermal breakdown (BD) of the structure occurs, the fluctuation modes are observed. At a lower given current flowing in the structure, the soft breakdown takes place a longer period of time after the beginning of the carrier injection into the dielectric. In Fig. 11b, the time interval of the soft breakdown is marked with arrows. During the soft breakdown, the irreversible changes in the dielectric are absent. According to [21], the soft breakdown is not observed in the oxide layers thicker than 5 nm when they are excited by the tunnel currents with the densities from 0.01 to 0.1 A/cm2.

In [19], the lf noise of the MOS capacitors based on n+Si*–SiO2–n+Si with the 6.3-nm and 7.1-nm oxide

layers and 10–2-mm2 gate is investigated. Figure 12 (the inset) displays the diagram of the MOS structure (DUT) and the device (Vap) setting the test mode. Current generator in initiates the fluctuations of given tunnel current IT flowing in the structure. Resistance Ru , from which the noise voltage en = inRu is tapped and applied to the input of the highly sensitive 5003 amplifier, is much smaller than the differential resistance of the MOS structure. Other units shown in the figure process and record the measured noise. The dielectric breakdown occurs in time interval tBD. The breakdown

Fig. 12. SDs of the current fluctuations at 0.5 Hz for the n+Si*–SiO2–n+Si structures with different oxide thickness

measured vs. the squared tunnel current (the inset displays the measuring facility) [19].

Fig. 13. RTS oscillograms for the n+Si*–SiO2–n+Si struc-

tures observed at different current loads [19]; the tunnel current IT = (a) 105 nA (hox = 7.1 nm), (b) IT = 475 nA (hox = 6.3 nm), and (c) IT = 165 nA (hox = 6.3 nm).

time highly depends on voltage Vap and varies from 15 minutes to six hours. During the investigations, it is established that there exist three stages of the structure damage occurring at the current loads characterized by different behavior of noise voltage en . At the first stage, SD of the voltage fluctuations Sen is stationary, which enables one to analyze the spectrum. The noise voltage (en) observations do not reveal any specific property of the time behavior at this stage of the breakdown. The

SD of the noise power Sin = Sen/ R2u is proportional to

squared current IT (Fig. 12), and Sin = I2T (B/f γ ), where γ ≈ 1 and B is a constant which depends on the MOS structure properties.

At the second stage of the structure damage, Sen is nonstationary. In this case, voltage en increases with time in the whole frequency band and manifests itself as an RTS. Depending on applied voltage Vap , the duration of this stage varies from several seconds to several minutes. Figure 13 displays the RTS oscillograms for the MDS structure operating at different current loads. When the currents are high, multilevel RTSs arise, which are caused by the carrier trapping–detrapping in the oxide. According to [19], the observed noise may be

attributed to the modulation of the potential barrier heights. The barrier height is modulated when electrons are locally trapped and detrapped in the oxide in the process of the carrier transportation through the dielectric. This stage corresponds to the soft breakdown of the oxide [21]. The soft breakdown (the second stage of the damage) of the ultrathin oxide is caused by an anomalous increase of the leakage current and highlevel fluctuations of the current. Note a specific property of the MDS structures with the ultrathin dielectric: at the soft-breakdown stage, the thermal breakdown, which damages the oxide, can be avoided [19]. However, at this stage of the breakdown, the number of defects generated in the weakest oxide region reaches the critical value.

The third stage is characterized by a high instability of voltage en . At the end of this stage, the irreversible breakdown of the dielectric occurs because the current increases and the Joule heat is locally released, which leads to the lateral expansion of these local regions over the gate area [21]. The MOS capacitor is completely damaged. Figure 13c displays the voltage (en) oscillogram observed at the oxide breakdown in the MDS device.

The results of the investigations show that one can evaluate the reliability of the MDS structures and determine the breakdown voltage of the ultrathin dielectric by recording high-intensity fluctuations of the MOS capacitor gate voltage, which are initiated at the softbreakdown stage when carriers are injected into the dielectric by the tunneling mechanism. The fluctuations in the form of the burst noise can serve as a precursor of the irreversible dielectric breakdown.

THE EXCESS NOISE OF THE MDS STRUCTURES

WITH THE RELIEF DIELECTRIC

In the modern MDS LSI, the thin gate oxide layer always adjoins the thick oxide layer (hox ≈ 1 µm) that insulates and protects the IM elements. The influence of the interface between the thin and thick oxide layers on the noise characteristics of the MOS structures is investigated in [12] using the MOS structures implemented on the KDB-12 silicon plates. These test samples are fabricated using the technology employed in the production of the n-channel MOS VLSI. The test structures consist of MOS capacitors of two types: capacitors with the planar thin (hox = 30 nm) oxide (the first type) and capacitors with the relief oxide containing thin (30 nm) and thick (900 nm) adjacent oxide films.

Figure 14 displays the cross section of the test MDS structure. The two MOS capacitors have equal areas (6 mm2) of the thin oxide layer, which enables one to compare the quality of the oxide layers in the cases when the interface between the thin and thick oxides is long (about 5.2 m), and when the interface is absent. In topological parameters, the test structures described above imitate VLSI. To prevent the formation of the inversion layer, the silicon substrate is additionally boron-doped, and the substrate is coated with the phos- phor-silicate glass layer in order to stabilize the oxide charge. Before the thermal oxidation, all silicon plates are chemically washed, after which half of them are immediately oxidized. The additional ion–plasma dry preoxidation treatment involving etching in the gas mixture with dry hydrogen chloride (combined cleaning) is applied to the rest of the plates. After that, the MDS structures are formed using one and the same technology in a single production cycle. The excess noise of the MOS capacitors is measured in the enhancement mode at the dielectric field intensity Eox = 3.5 MV/cm (the gate is negatively biased). The measurements are compared with the experimental data on breakdown voltages UBD , which are determined after the SD of the noise power is measured by the damage method indicating the irreversible breakdown of the dielectric.

The investigation of the structures with the thin oxide demonstrates that, in the frequency band 20 Hz– 20 kHz, the SD of the noise power is greater than 10−29 A2/Hz for the plates treated by both kinds of pre-

oxidation processing technique. At the same time, for the structures with the thin oxide obtained using the combined preoxidation processing, the average break-

down field intensity EBD is higher ( EBD = 1.1 × 107 V/cm) than that for the MOS structures which are

only chemically cleaned ( EBD = 0.73 × 107 V/cm). The number of the investigated structures of each type is 100.

The MOS structures with the relief oxide exhibited the noise level by one–two orders of magnitude higher than the MOS structures with the planar oxide. The excess noise level was measured at 380 Hz and in the band ∆ f = 200 Hz. The structures that were only chemically cleaned exhibited a higher-level noise and a larger noise spread than the structures treated by the combined preoxidation processing technique. In addition to a lower-level excess noise, the structures treated by the dry-cleaning technique in the gas medium had a higher breakdown voltage.

The thermal–field tests of the MDS structures performed during 50 min at the temperature 473K and the dielectric field intensity 6 MV/cm did not reveal any oxide charge instability in the structures of all types with both thin and relief oxide (bias ∆ UFB of the flat bands was lower than 0.05 V). Thus, one may conclude that a high-level noise in the structures with the relief oxide is caused by the processes occurring at the impu- rity-defect trap levels along the interface between thin and thick oxides (the density of these levels depends on the quality of the silicon plate preoxidation processing) rather than by the oxide charge instability. Most structure defects are formed on the interface between the thin and thick oxide layers, and the relief oxide breakdown occurs exactly along this interface.

The correlation coefficients between the SD of the excess noise power and breakdown voltage UBD are calculated for 200 structures with the relief oxide fabricated using different kinds of preoxidation processing. For the structures processed in the dry gas medium before oxidation, the correlation coefficient is R{SI, UBD} = –0.72 at the significance level 0.05 within the confidence interval ±0.15, and for the structures only chemically cleaned, R{SI , UBD} = –0.67. The negative values of the correlation coefficient indicate that lower breakdown voltages correspond to a higher-level excess noise. A considerable correlation between the SD of the excess noise power and the breakdown voltage of the MOS structures ensures the choice of the noise level as an informative diagnostic parameter for evaluating the quality of the performed technological processes. The excess noise level is coupled with the trap density in the oxide and on the interface between the thin and thick oxides, i.e., with the density of the production defects. The excess noise level can be used for predicting the dielectric breakdown voltage of the MOS structures.

The interface between the thin and thick oxide layers also substantially affects the excess noise level in the MDS transistors. Studies [48] report about a strong influence of the lateral insulation between the MOS transistors (the thick insulating oxide between the transistors is obtained by the local-oxidation technique called the LOCOS technology) on the level of the lf noise in the MOS transistors with the buried gate dielectric (hox = 28 nm). The authors attribute the observed noise to the trapping in the thin oxide and on the interface of the thin and thick oxide layers, where the trap density is nonuniform. When the insulating oxide is manufactured using different technologies, the transistor noise levels may differ more than by an order of magnitude [49], which is due to different trap densities on the interface of the thin and thick oxide layers.

THE EFFECT OF RADIATION TREATMENT

ON THE EXCESS NOISE

OF THE MDS STRUCTURES

Investigations of the MDS transistors show that the 1/f noise level increases with the radiation dose [50, 51], the noise increase being greater for the n-channel MOS transistors (than for the p-channel transistors) and for the transistors whose noise level was higher before the radiation treatment (RT). It is found that when the Si–SiO2 structure is treated with the ionizing γ -radia- tion, the oxide positive charge increases on the point defects and, simultaneously, fast ISs are created on the interface [39, 50]. At the subsequent low-temperature annealing (Tan = 80°C), the oxide traps are mainly annealed. During this process, the 1/f noise level decreases, while the interface charge remains constant [50]. It is shown that the density of the ISs emerging in the process of radiation depends on their initial density, and the number of newly formed ISs is greater for the structures with the greater initial IS density [5, 50]. In the n-channel MOS transistors, a strong correlation is observed between the 1/f noise level before the RT and the vanishing threshold voltage after the γ -radiation treatment [5, 50]. This result enables one to predict the radiation resistance of the MDS transistors by the level of their initial 1/f noise.

As mentioned above, in the MDS induced-channel transistor, the excess noise can be measured only under strong inversion of the semiconductor surface. Therefore, investigations of the RT influence on the excess noise level of the MDS structures operating in different modes are of considerable interest. The results of these investigations are presented in [17, 18]. The test samples are implemented on the plates fabricated of the KDB-10 p-type silicon of the orientation (100) with the 10–12-nm oxide and Al gates (Ag = 0.6 mm2). The dielectric layers in the MDS structures were fabricated by different technological methods. The samples were treated with the 106-rad γ -radiation dose using the cobalt facility. After the RT, the density of the fast ISs

4

3

2

1

Fig. 14. Cross section of the test structure with the relief dielectric [12]: (1) silicon substrate, (2) additionally borondoped regions, (3) SiO2 (30 and 900 nm), (4) polysilicon,

(5) Al, (6) phosphor-silicate glass, (7) thin oxide (30 nm), and (8) relief oxide.

U, V

Fig. 15. SDs of the excess noise power measured vs. the bias voltage at 110 Hz for the samples of the MDS structures (fabricated using different technological methods) after the RT; (1) pyrogenic oxidation, hox = 10.4 nm and D = 5.5 ×

1012 cm–2; (2) plasmachemical oxinitride deposition, hox =

12 nm and D = 4.2 × 1012 cm–2; and (3) thermal oxidation, hox = 11.7 nm and D = 1.56 × 1012 cm–2.

increased approximately by an order of magnitude. Before the RT, the excess noise of the structures was higher in the inversion mode than that in the enhancement mode, and the behavior of SU(U) was similar to the behavior of curves 1 and 2 plotted in Fig. 3.

Figure 15 displays the SDs of the excess noise power versus the bias voltage; that data are obtained at 110 Hz for the samples of the MDS structures manufactured by different methods after the RT with different density D of the fast ISs. One can see from the figure that all the samples (fabricated by different technological methods) of the RT-subjected structures exhibit a higher-level noise in the enhancement mode, i.e., the behavior of the corresponding dependences S(U) changes after the RT. This result demonstrates that, after the RT, additional GR levels are formed in the vicinity of the top of the silicon valence band on the Si−SiO2 interface. The existence of this effect is confirmed by the presence of the GR noise components

observed for these structures [18]. The contribution of the GR noise to the excess noise decreases with the density of the fast ISs. This result indicates that the GR noise is due to the GR processes at the ISs formed on the Si−SiO2 interface after the RT. It is known [52] that the ionizing radiation causes the break of chemical links between the silicon and oxygen atoms on the Si−SiO2 interface, which leads to the formation of new ISs, whose density steeply increases when the energy level approaches the edges of the permitted bands. This effect explains the higher-level excess noise observed in the enhancement mode for the radiation-treated structures and low values of the activation energy in the temperature dependence of the excess noise [16]. The RT-subjected structures exhibit a proportional dependence of the SD of the excess noise power on the density of the fast ISs in the range from 1011 to 5 × 1012 cm–2 observed in the frequency band 20 Hz–1 kHz. This result and the data presented in [39, 50] show that, when the structures are radiated, the oxide traps and fast ISs are simultaneously formed on the Si–SiO2 interface.

CONCLUSION

The results of investigations presented in this paper demonstrate that, in the MDS structures, the excess noise is initiated simultaneously by several physical mechanisms. The excess noise can be caused by the charge exchange between the ISs on the Si–SiO2 interface and the oxide traps; the GR processes on the Si– SiO2 interface and the semiconductor SCR in the depletion and inversion modes; and by the dielectric currents. The noise level in the structures with leakage currents is several orders of magnitude greater than that in the structures without leakage currents. In the structures with low leakage currents (j ~ 10–13–10–9 A/mm2), the 1/f noise level and the leakage current are not correlated. In the presence of high-intensity electric fields, the excess noise in the MDS structures is due to the trap fluctuation processes near the semiconductor–dielec- tric and semiconductor–gate interfaces as well as to the carrier transportation through the dielectric. The structures with the Mo gate exhibit a lower-level noise than the structures with the Al gate. In the MDS structures with the high-quality dielectric which does not contain pore-type defects, the 1/f noise level sharply increases as the voltage approaches the breakdown values. In the presence of the prebreakdown fields, the exponent of the spectrum increases up to γ ≈ 2.5–3 when the voltage approaches the breakdown values. The SD of the noise power is noticeably correlated with the breakdown voltage (the correlation coefficient is R{SI , VBD} ≈ −0.7) in the vicinity of the breakdown voltage. Before the breakdown, a specific sort of the excess noise is observed which consists of RTSs. The MDS structures with the relief dielectric containing the interface between the thin and thick oxide layers (the LOCOS

insulation) exhibit a high-level noise due to the edge effects on the interfaces between the thin and thick oxides. In the MDS structures with high leakage currents due to the dielectric defects or with the dielectric damaged under the high-voltage impact, the SD of the noise power is a quadratic function of the current. These structures exhibit a high-level noise. The RT of the MDS structures results in the formation of the oxide traps and fast ISs on the Si–SiO2 interface. After the

impact of the 106-rad γ -radiation dose, additional GR levels appear in the vicinity of the top of the silicon valence band on the Si–SiO2 interface.

The excess noise is an informative diagnostic tool for evaluating the quality of the MDS structures.

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