
- •1 Combination Circuits
- •1.1 Circuitry ttl-elements with Shottky diodes
- •Levels of Integration
- •Typical Set of ttl iCs
- •Transistor-transistor logic (ttl)
- •1.2 Element with the open collector Open-collector outputs
- •Tristate outputs
- •1.3 Emitter-coupled logic (ecl)
- •Emitter-coupled Schmitt trigger
- •Emitter-coupled multivibrator
- •1.4 Decoder
- •Priority decoder
- •Binary Decoders
- •Decoder Networks
- •1.5 Coder units Encoder Networks
- •Binary Encoders
- •Priority Encoders
- •1.6 Multiplexers (Selectors)
- •1.7 Multiplexer Trees
- •Demultiplexer Networks
- •Encoder Networks
- •1.8 Demultiplexers (Distributors)
- •1.9 Applicanion of multiplexer
- •1.10 Code converters
- •1.11 Shifters
- •Shifter Networks
- •Barrel Shifter
- •1.12 Comparators
- •Window comparator
- •Digital comparators
- •2 Sequentional Circuits
- •2.1 Circuritry of flips
- •Sequential logic systems
- •Integrated flip-flops
- •Transparent flip-flops
- •Clocked rs flip-flop
- •Clocked d flip-flop
- •Flip-flops with intermediate storage
- •2.2 Flips types Single-edge-triggered flip-flops
- •2.3 Statik registers
- •2.4 Shift register Combinatorial shift register (barrel shifter)
- •Shift Registers
- •2.5 Counters
- •Asynchronous straight binary counter
- •Counters
- •Ripple Counters
- •Asynchronous bcd counter
- •2.6 Synchronous reversal counters
- •Synchronous straight binary counters
- •Synchronous bcd counter
- •Synchronous one-shot
- •Synchronous edge detector
- •Synchronous clock switch
- •2.7 Schmitt flip-flops Schmitt trigger
- •Inverting Schmitt trigger
- •Precision Schmitt trigger
- •3 Memory Devices
- •3.1 Circuitri of memori element Semiconductor memories
- •3.2 Mask-type lic of the rom
- •RaMs as shift registers
- •First-In-First-Out Memories (fifOs)
- •Fifo implementation using standard raMs
- •Error detection and correction
- •Parity bit
- •Hamming code
- •3.3 Rom with singl programming Read-only memories (roMs)
- •Mask-programmed roMs (mroMs)
- •Programmable roMs (proMs)
- •3.4 Memori element with electrical erase Electrically erasable proMs (eeproMs)
- •3.5 Static ram
- •Timing considerations
- •3.6 Dynamic raMs
- •Dynamic ram controllers
- •3.7 Devices programmed
- •Programmable logic array (pal)
KNURE
Department of CE
Lectures on
COMPUTER ELECTRONICS
Part 2
Semiconductor devices in computers
Composed by R.Umyarov
Kharkov 2002
1 Combination Circuits………………………………………………… 5
1.1 Circuitry TTL-elements with Shottky diodes……………………………… 5
1.2 Element with the open collector…………………………………………… 8
1.3 Emitter-coupled logic (ECL)………………………………………………. 10
1.4 Decoder…………………………………………………………………….. 15
1.5 Coder units………………………………………………………………… 26
1.6 Multiplexers (Selectors)…………………………………………………… 32
1.7 Multiplexer Trees…………………………………………………………. 34
1.8 Demultiplexers (Distributors)……………………………………………… 36
1.9 Applicanion of multiplexer………………………………………………… 38
1.10 Code converters…………………………………………………………… 39
1.11 Shifters……………………………………………………………………. 43
1.12 Comparators………………………………………………………………. 49
2 Sequentional Circuits………………………………………………… 53
2.1 Circuritry of flips…………………………………………………………… 53
2.2 Flips types…………………………………………………………………. 58
2.3 Statik registers…………………………………………………………..…. 60
2.4 Shift register……………………………………………………………….. 62
2.5 Counters……………………………………………………………………. 67
2.6 Synchronous reversal counters…………………………………………….. 77
2.7 Schmitt flip-flops………………………………………………………….. 80
3 Memory Devices………………………………………………………. 85
3.1 Circuitri of memori element………………………………………………… 85
3.2 Mask-type LIC of the ROM………………………………………………… 86
3.3 ROM with singl programming……………………………………………… 96
3.4 Memori element with electrical erase………………………………………. 101
3.5 Static RAM…………………………………………………………………. 103
3.6 Dynamic RAMs……………………………………………………………. 108
3.7 Devices programmed………………………………………………………. 111
1 Combination Circuits
1.1 Circuitry ttl-elements with Shottky diodes
A diode in the base-collector junction of the transistors that prevents them from going into saturation and, therefore, reduces the switching time out of saturation. To perform this function, the diode has to have a low voltage between its terminals; Schottky diodes have this property. The diode is constructed as part of the transistor, resulting in what is called the Schottky transistor.
The low-power Schottky TTL family has higher resistance values than the Schottky TTL. This has the effect of reducing the power consumption and increasing the delay. This family has a good speed-power product and therefore is widely used.
Improvements have been made in the technology producing variations of the Schottky TTL with better speed-power products. Examples of these are Texas Instruments Advanced Schottky (AS), Advanced Low-power Schottky (ALS), and Fairchild Advanced Schottky (FAST). Table 1.1 gives a summary of the power consumption, delay, and speed-power product of all variations.
Table 1.1- Characteristics of TTL Variations.
-
Family
Delay (ns)
Power Dissipation (mW)
Speed-Power Product
Standard TTL
10
10
100
Low-power TTL
33
1
33
High-speed TTL
6
22
132
Schottky TTL
3
19
57
Low-power Schottky TTL
9.5
2
19
Advanced Schottky TTL
2
14
28
Advanced low-power Schottky TTL
4
1
4
FAST
2
4
8
Levels of Integration
TL chips contain a range of number of gates. According to this number have SSI, MSI, and LSI chips.
SSI chips contain several independent gates, with inputs and outputs going to pins in the package. The number of gates is limited by the number of pins in the package, typically 14 to 16 pins.
MSI chips contain up to 100 gates and implement functions such as decoders, multiplexers, registers, counters, and adders. The number of gates is again limited by the number of pins, since these functions still have a relatively low gates per pin ratios.
LSI chips contain up to 500 gates. They implement functions such as bit-slice processor elements, memory, and I/O controllers. The number of gates that can be included in a chip is limited by the area (occupied by the gates and the connections) and by the power dissipation.
Other bipolar technologies, I/O compatible with TTL, implement VLSI chips with up to 2500 gates per chip. They include building blocks that are used in the implementation of microprogrammed and computers and controllers.
On-Chip and Off-Chip Connections
In the implementation of the MSI/LSI chips it is possible to distinguish two types of gates: those that are totally internal to the chip, having no direct connection to the pins of the chip, and those that are connected to the external pins, especially to the output pins. The first type of gate can be low-power and does not require totem-pole outputs since its load is internal and is characterized by a small capacitance. On the other hand, the gates that drive the external output might require a totem-pole configuration and be of higher power dissipation to be able to handle the external load both statically (sufficient current) and dynamically (fast rise times).