Diss / 10

Zij2 is the squared amplitude envelope of the signal at the cell ij, and j = 0.5m,…, MR − 0.5m, where MR is the number of discrete resolution elements by radar range. As we can see from (9.7), under averaging we do not take into consideration the signal cell and the neighboring cells at right and left. This action is directed to suppress the effect of signal peak and the first signal side lobes on the estimation of interference and noise variance.

The interference and noise map is formed for zero Doppler channel [2–4]. The interference and noise map is a characteristic of the average by the set of power observations of the signals reflected by the underlying surface and local objects for each resolution element by radar range and azimuth. This map is stored by the specific memory. The current magnitude of the interference and noise power at zero Doppler channel is defined by signals forming at the output of the Doppler channel for zero velocity. Periodical, with interval equal to the scanning period, update of the interference and noise map is carried out by rearranging the previously averaged and current power of interference and noise for each resolution element by radar range and azimuth, for example, using the formula for exponential smoothing.

Detection of targets with zero or very low radial velocity is made employing the interference and noise map. Target return signals for these targets will appear and accumulate at zero Doppler channel. The detection threshold for each resolution element by radar range R and azimuth β is formed taking into consideration the average power of signals reflected by the underlying surface and local objects. If the signal reflected by the slowly moving target or target moving with the blind velocity exceeds this threshold, this signal will be detected.

Thus, adaptation of the interference and noise power can maintain the stability of false alarm probability while detecting target return signals, but, in this case, the average number of false detections is not controlled and can be estimated only during the simulation and digital signal processing and control subsystem sample debugging.

The next topic to be discussed involves the following: automatic target lock-in, target trajectory tracking, and target trajectory reset. Given the technical specifications, the number of target tracking trajectories, Ntg = 20, and the probability of target trajectory tracking without reset, Ptt ≥ 0.95, can be considered as a moderate mode. However, if the radar system has to function on the automatic mode under conditions of high-level interference, it entails prevention of overloading at the digital signal processing subsystem specifically in the context of nondetection of moving targets or detection of false targets. To thwart such effects, the following measures are recommended:

•Effective algorithm to detect the target trajectories providing the methods and procedures to decrease the probability of false target track beginning

•Selection of target pips in target tracking gates, taking into consideration the high density of false target pips

•Filtering the target trajectory parameters providing tracking of both nonmaneuvering and maneuvering targets

•Implementation of specific algorithms of target classification providing a selection of the most important targets for target tracking

•Ensuring speed of operation and better utilization of resources such as memory capacity of central computer system

When the radar system operates under automatic mode, it is important to ensure effective control of the radar system as a whole and functional synchronization of all elements, with the central microprocessor system. Algorithmic designing and realization of digital signal processing and control subsystem are specific tasks under construction of central computer system.

We have just considered only the main types of subsystems of the CRS central computer system. Naturally, other subsystems or constituents of the central computer system also play an important role in functioning, for example, the digital signal processing and control subsystem,

the subsystem to communicate with users, and so on. However, given the limited scope and space in this chapter, it is not possible to discuss in detail the features and operations of all subsystems inherent to the radar system.

9.2.3  Central Computer System Structure for Signal Processing and Control

The principle of signal processing is divided into several stages: coherent digital signal preprocessing, noncoherent digital signal preprocessing, and digital signal reprocessing used as a basis for designing the structure of digital signal processing and control system of the radar complex. In addition, individual elements of the central computer system can be considered as subsystems to be used for the signal processing in cases, for example, of the “native–foreigner” mode subsystem and CRS control. Taking into account these considerations, an example of the structure of global digital signal processing and control system is provided in Figure 9.1. We see that the following subsystems solving the direct problems of digital signal processing and control (the rectangles with bold lines) and carrying out the transmission, receiving, and preliminary signal processing are the constituents of the global digital signal processing and control system. Data flow is represented by continuous lines and the interaction between subsystems is shown by dashed lines. Each subsystem included into the structure of the global digital signal processing and control system solves the following problems:

1.The digital coherent target return signal preprocessing subsystem:

a.Matched filtering and compression of the linear-frequency-modulated pulses

b.Double interperiod subtraction of the target return signals by rejector filters

c.Eight-point FFT of target return pulse bursts

d.Weighting of target return signal amplitudes at the FFT processor or filter output

e.Definition of target return signal amplitudes at each resolution element by radar range and Doppler frequency

FIGURE 9.1  Global structure of the digital signal processing and control subsystem employed by the radar complex.

2.The digital noncoherent target return signal preprocessing subsystem:

a.Noncoherent accumulation of target return signals of the three processed pulse bursts in the corresponding cells

b.Corrections of the map of passive interferences formed by reflections from the underlying surface and local objects

c.Adaptive detection of target return signals

d.Estimation of target range

e.Estimation of target azimuth

3.The digital signal reprocessing subsystem:

a.Detection of target tracks

b.Tracking the detected target trajectories

c.Estimation of coordinates and parameters of moving target trajectories

d.Estimation of target importance

e.Providing information to the user

4.Digital subsystem of CRS control provides detailed and prompt information:

a.Control of the CRS switching on

b.Variation in scanning pulse frequency

c.Control of the radar antenna directional diagram beam

d.Control of the detection thresholds and so on

The control signals are generated both in real-time and in asynchronous mode to control the system operation, the request “native–foreigner” mode subsystem, and so on. Furthermore, the foregoing list of subsystems will be discussed and considered in more detail.

9.3  STRUCTURE OF COHERENT SIGNAL PREPROCESSING MICROPROCESSOR SUBSYSTEM

The digital coherent signal preprocessing subsystem ensures an interface between the analog receiver linear tract and the central computer system of radar complex. The following important operations are carried out by the digital coherent signal preprocessing subsystem:

•Analog-to-digital conversion

•Signal detection based on the generalized approach to signal processing in noise of linear- frequency-modulated target return signals

•Suppression of passive interferences

•Coherent accumulation of target return signals

•Data provision to assist with solving the problems of stabilization of the probability of false alarm

The digital coherent signal preprocessing subsystem is realized by an individual microprocessor sub-subsystem or a distributed set of specific microprocessor sub-subsystems.

A key part of the design process involves the design and construction of the digital coherent signal preprocessing subsystem and justification of structure of the corresponding microprocessor sub-sub- system or set of microprocessor sub-subsystems. Further, we assume that the following alternatives are key to designing and constructing the digital coherent signal preprocessing microprocessor subsystem:

•Design and construction of specific microprocessor sub-subsystem based on very-large- scale integration (VLSI) circuits

•Microcomputer based on a set of microprocessor sub-subsystems

•Specific processor based on analog charge-coupled device components

the limiting frequency of sampling in time must be fs = 500 kHz both for in-phase and quadrature channels. However, to improve the digital GD (DGD) characteristics it is worthwhile to increase this frequency, at least twice, that is, fs = 1 MHz (see Chapter 2). The number of amplitude quantization bits is selected based on linear transformation of the target return signals exceeding the receiver noise on 50–60 dB. For this purpose, we need to use 10-bit ADC and/or ADC with capacity of more than 10 bits. Thus, ADC must issue the signal codes at the outputs of in-phase and quadrature chan-

nels with resolution τs = 1 μs and capacity Ncapacity = 10 bits.

Next element of the total structure of digital coherent target return signal preprocessing subsystem is the DGD for linear-frequency-modulated target return signals that can be realized in time domain employing the nonrecursive filter or in frequency domain using the FFT processor or filter. In doing so, while using the sequential scheme of DGD in time domain to compute a single

magnitude of the output signal, we need to use 4fsτscan = 4 × 1 × 64 = 256 multiplications and 252 additions. Consequently, the required speed of operation of DGD is equal to 256 × 106 multiplica-

tions per second, which is very difficult to realize. Under realization of DGD in frequency domain we obtain some benefits in speed of operations (see Chapter 2), but these benefits are not so essential that we could use them without any doubts.

To improve the DGD speed of operation we can use properties of parallelism of matched filtering algorithms. For this reason, to realize DGD with high speed of operation we can use the parallel mixers based on ROM, parallel adders with simultaneous addition of several numbers, and parallel registers. For example, for parallel nonrecursive digital filter, coincidence-type adders, and parallel registers the minimal time of convolution both in the in-phase channel and in the quadrature channel is 75 ns. For a four-channel DGD (see Figure 2.7) the minimal time to obtain a single magnitude of the output signal is 100 ns.

The nonrecursive smoothing filter with short impulse response is placed after DGD. The main tasks of this filter are, first, to suppress the signal side lobes at the DGD output and, second, to decrease the sampling rate to the frequency corresponding to the sampling theorem requirements. Decrease in the sampling rate in m times (m is the integer) is carried out by the element providing a sample of each mth element from the sequence of input sampled target return signals {x(kTs)}. As a result, we obtain the output signal {x(kmTs)} with the sampling period Ts′ = mTs. Naturally, the sampling period Ts′ must satisfy the following condition:

both at the in-phase channel and at the quadrature channel.

The cancellation of correlated interference is realized after the signal detection based on the generalized approach to signal processing in noise. For this purpose, the samples of in-phase and quadrature channels in each resolution element by radar range (the number of resolution elements by radar range is MR = 500) are stored during 10 periods by the buffer memory with capacity of QBM = 2 × 500 × 10 = 104 of 10-bit words. After that, 10-pulse bursts corresponding to each resolution element by radar range are processed by the rejector filters with the interperiod subtraction of the order ν = 2 individually both in the in-phase channel and in the quadrature channel. Owing to the simplicity of the rejector filters with the interperiod subtraction of the order ν = 2 algorithm, its realization in real time is not difficult. Thus far, we have considered and discussed operations during the first stage of digital coherent signal processing. To ensure the required reliability, all hardware elements of the first stage must be doubled. The output signals of the main and reserved hardware set are compared by a specific module. Comparison results are used both by the searching system and by the default system.

Signals at the outputs of the rejector filters with the interperiod subtraction of the order ν = 2 in the form of 8-pulse bursts come in individually by the in-phase and quadrature channels at the input of filter carrying out a coherent accumulation of the target return signals within the limits of 8-pulse

the requirements of the probability of false alarm for the target with zero velocity—this probability of false alarm can differ from the admissible probability of false alarm for moving target.

5.Signal detection is provided by a comparison between the signals and their corresponding thresholds computed for each cell “radar range–Doppler frequency.” To reduce the number of references to the interference and noise power map, the received signal of Doppler zero frequency channel is first compared with the constant threshold defined based on the permissible magnitude of the probability of exceeding the receiver noise power by this signal. If exceeding takes place, then the threshold is computed using the interference and noise power map and the signal is compared with the threshold. As a result of this comparison with the thresholds, we can observe one or several signals exceeding the detection threshold at some resolution elements by radar range. For a single realization of threshold formation and generalized signal detection algorithms one multiplication on the constant value and one comparison of two magnitudes are required. In doing so, the number of computer operations does not exceed 7–8. Within the limits of a single period of duration of 24 ms, 4000 realizations of the generalized signal processing algorithms must be done.

6.Estimation of the target azimuth by a set of signals exceeding the detection threshold at three neighboring positions of the radar antenna directional diagram by azimuth. For this purpose, at first, we need to select signal groups exceeding the detection threshold and related to the same radar range. If there is a single signal that exceeds the detection threshold into the group, then the target azimuth is defined by azimuth direction of this signal. If there are two or three signals that exceed the detection

threshold into the group, then, at first, we need to choose the greatest signal, that is, the signal with maximum amplitude. The azimuth direction of this signal is β[i]. Azimuth adjustment can be provided taking into consideration a single additional side signal using the following formula:

where Zi is the amplitude of maximum signal;

φ(ϑ) is the function characterizing the shape of radar antenna directional diagram.

For a single realization of the generalized signal processing algorithm given by (9.10) through (9.12) about 30 reduced microprocessor operations are required. For this purpose, the duration required is 24 ms. The number of realizations per cycle is the random variable characterizing the possible number of targets at three azimuth directions close to each other. The problems considered

and discussed so far related to the noncoherent signal preprocessing and are solved using the corresponding partial signal processing algorithms. The total partial generalized signal processing algorithm is the global noncoherent target return signal preprocessing algorithm.

9.4.2  Noncoherent Signal Preprocessing Microprocessor Subsystem Requirements

In contrast to the coherent signal preprocessing algorithm, all main operations of the noncoherent signal preprocessing are programmable and cyclical by periodicity. Each problem of the noncoherent signal preprocessing possesses its own cycle, and, consequently, specification of speed of the microprocessor subsystem operation differs from other microprocessor subsystems used by the CRS. The microprocessor of highest throughput is required to fulfill the noncoherent target return signal accumulation. The period of this operation is equal to the period of the coherent target return signal preprocessing, that is, Tcycle = 8 ms. The addition of previous sums with new magnitudes of target return signal amplitudes must be carried out at 500 × 8 = 4000 cells of “radar range–Doppler frequency” complex within the limits of 8 ms. The number of elementary operations of single summation is equal to 3, for example. Then, within the limits of 8 ms there must be 4000 × 3 = 12 × 103 operations per cycle produced, which means the effective speed of operation of the noncoherent target return signal preprocessing microprocessor subsystems must be

This requirement can be made less stringent if we consider that the real number of resolution elements by radar range will be less than 500, since the maximum radar range is less than the predetermined radar range, which is based on the scanning pulse frequency. Nevertheless, the required speed of operations exceeds 106 operations per second. Computations of the required effective speed of operation for all tasks accomplished by the noncoherent target return signal preprocessing microprocessor subsystem are presented in Table 9.1.

As follows from Table 9.1, the required effective speed of operation of the noncoherent target return signal preprocessing microprocessor subsystem under realization of the partial generalized signal processing algorithms is not more than 2.5 × 106 operations per second. If we assume that all

TABLE 9.1

Effective Operation of Speed to Carry Out All Operations by the Noncoherent Target Return Signal Preprocessing Subsystem