ADSP-2192M

Table 9. 16-Bit PCI DSP Memory Map (BAR3 Mode)1 (continued)

Block

Byte3

Byte2

Byte1

Byte0

Offset

 

 

 

 

 

 

 

 

DSP P0 Data RAM

D[15:8]

D[7:0]

D[15:8]

D[7:0]

0x0001

8000

Block 3

D[15:8]

D[7:0]

D[15:8]

D[7:0]

0x0001

8004

 

. . .

. . .

. . .

. . .

. . .

 

 

D[15:8]

D[7:0]

D[15:8]

D[7:0]

0x0001

FFFC

 

 

 

 

 

 

 

DSP P0 Program RAM

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0002

0000

Block

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0002

0004

 

. . .

. . .

. . .

. . .

. . .

 

 

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0002

7FFC

 

 

 

 

 

 

 

DSP P0 Program ROM

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0002

8000

Block

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0002

8004

 

. . .

. . .

. . .

. . .

. . .

 

 

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0002

9FFC

 

 

 

 

 

 

Reserved Space

RESERVED

RESERVED

RESERVED

RESERVED

0x0002 A000

 

. . .

. . .

. . .

. . .

. . .

 

 

RESERVED

RESERVED

RESERVED

RESERVED

0x0003 FFFC

 

 

 

 

 

 

 

DSP P1 Data RAM

D[15:8]

D[7:0]

D[15:8]

D[7:0]

0x0004

0000

Block 0

D[15:8]

D[7:0]

D[15:8]

D[7:0]

0x0004

0004

 

. . .

. . .

. . .

. . .

. . .

 

 

D[15:8]

D[7:0]

D[15:8]

D[7:0]

0x0004

7FFC

 

 

 

 

 

 

 

DSP P1 Data RAM

D[15:8]

D[7:0]

D[15:8]

D[7:0]

0x0004

8000

Block 1

D[15:8]

D[7:0]

D[15:8]

D[7:0]

0x0004

8004

 

. . .

. . .

. . .

. . .

. . .

 

 

D[15:8]

D[7:0]

D[15:8]

D[7:0]

0x0004

FFFC

 

 

 

 

 

 

 

Reserved Space

RESERVED

RESERVED

RESERVED

RESERVED

0x0005

0000

 

. . .

. . .

. . .

. . .

. . .

 

 

RESERVED

RESERVED

RESERVED

RESERVED

0x0005 FFFC

 

 

 

 

 

 

 

DSP P1 Program RAM

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0006

0000

Block

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0006

0004

 

. . .

. . .

. . .

. . .

. . .

 

 

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0006

7FFC

 

 

 

 

 

 

 

DSP P1 Program ROM

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0006

8000

Block

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0006

8004

 

. . .

. . .

. . .

. . .

. . .

 

 

D[23:16]

D[15:8]

D[23:16]

D[15:8]

0x0006

9FFC

 

 

 

 

 

 

Reserved Space

RESERVED

RESERVED

RESERVED

RESERVED

0x0006 A000

 

. . .

. . .

. . .

. . .

. . .

 

 

RESERVED

RESERVED

RESERVED

RESERVED

0x0007 FFFC

 

 

 

 

 

 

 

1The “. . .” entries in this table indicate the continuation of the pattern shown in the first rows of each section.

16-Bit PCI DSP I/O Memory Map (BAR4)

PCI Base Address Register (BAR4) allows indirect access to the ADSP-2192M Control Registers and DSP Memory. The DSP Memory Indirect Access Registers accessible from BAR4 are shown in Table 10.

DSP P0 Memory Indirect Address Space occupies PCI BAR4 Space 0x000000 through 0x01FFFF

DSP P1 Memory Indirect Address Space occupies PCI BAR4 Space 0x020000 through 0x03FFFF

All Indirect DSP Memory Accesses are 24-bit or 16-bit Word Accesses.

Using the USB Interface

The ADSP-2192M USB design enables the ADSP-2192M to be configured and attached to a single device with multiple interfaces and various endpoint configurations, as follows:

1.Programmable descriptors and a class-specific command interpreter are accessible through the USB 8052 registers. An 8052 compatible MCU is supported on-board, to enable soft downloading of different configurations, and support of standard or class-specific commands.

2.A total of eight user-defined endpoints are provided. Endpoints can be configured as BULK, ISO, or INT, and can be grouped.

REV. 0

–13–

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