ADSP-218xN Series
Bus Request–Bus Grant
Table 17. Bus Request–Bus Grant
Parameter |
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Min |
Max |
Unit |
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Timing Requirements: |
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tBH |
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Hold after CLKOUT High1 |
0.25tCK + 2 |
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ns |
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BR |
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tBS |
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Setup before CLKOUT Low1 |
0.25tCK + 8 |
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ns |
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BR |
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Switching Characteristics: |
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tSD |
CLKOUT High to |
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Disable2 |
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0.25tCK + 8 |
ns |
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xMS, |
RD, |
WR |
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tSDB |
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xMS, |
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RD, |
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WR |
Disable to |
BG |
Low |
0 |
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ns |
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tSE |
BG |
High to |
xMS, |
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RD, |
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WR |
Enable |
0 |
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tSEC |
xMS, |
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RD, |
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WR |
Enable to CLKOUT High |
0.25tCK – 3 |
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ns |
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tSDBH |
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Disable to |
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Low3 |
0 |
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xMS, |
RD, |
WR |
BGH |
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tSEH |
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High to |
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Enable3 |
0 |
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ns |
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BGH |
xMS, |
RD, |
WR |
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1BR is an asynchronous signal. If BR meets the setup/hold requirements, it will be recognized during the current clock cycle; otherwise the signal will be recognized on the following cycle. Refer to the ADSP-2100 Family User’s Manual for BR/BG cycle relationships.
2xMS = PMS, DMS, CMS, IOMS, BMS.
3BGH is asserted when the bus is granted and the processor or BDMA requires control of the bus to continue.
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tBH |
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CLKOUT |
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BR |
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tBS |
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CLKOUT |
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PMS, DMS |
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BMS, RD |
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CMS, WR, |
tSD |
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tSEC |
IOMS |
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BG |
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tSDB |
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tSE |
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BGH |
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tSDBH |
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tSEH |
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Figure 26. Bus Request–Bus Grant
REV. 0 |
–29– |