Теория управления / Л4-Миль-Мур-СА / pics / 6-sequential logic-31
.pdfGeneral realization (program)
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Combinational circuit that |
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Output = f(input, old state) |
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new state = h(input, old state) |
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A.J. Han Vinck |
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An example |
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combinational |
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memory |
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A.J. Han Vinck |
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General finite state machine
Specified by: inputs
content of memory elements, called states transitions between states
outputs Analyzed by:
state transition graphs (Markov chains) state transition tables
A.J. Han Vinck |
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Some history on finite state machines
the early application: to model the human thought process, whether in the brain or in a computer. (Warren McCulloch and Walter Pitts, "A Logical Calculus Immanent in Nervous Activity", 1943)
G.H. Mealy and E.F. Moore, generalized the theory to much more powerful machines in separate papers, published in 1955-56. The finite-state machines, the Mealy machine and the Moore machine, are named in recognition of their work.
Moore E. F.
Gedanken-experiments on Sequential Machines.
Automata Studies, Annals of Mathematical Studies, 34, 129–153.
Princeton University Press, Princeton, N.J.(1956). (thanks to Einstein)
GH Mealy. |
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A method for synthesizing sequential circuits. Bell System Technical |
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Journal, 35(5):1045—. 1079, 1955. |
A.J. Han Vinck |
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There are 2 types of sequential machines
Moore
Mealy
Difference between Moore and Mealy state machines:
- In Mealy, output changes immediately when the input changes (faster) |
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-Moore gives response in the next clock. |
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-Mealy state machine uses in general less states than the Moore. |
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A.J. Han Vinck |
Diagram of a Hopfield type network
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we now look at:
1.the time or clock signal
2.state diagram/table with an example
3.state table minimization
A.J. Han Vinck |
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FF-Timing revisited
clk Q‘
There is no problem when x(t) has full duty cycle
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The signal x(t) is delayed by 1 time unit
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u(t) = x(t-1) |
clock
The content of the flip-flop is also called its state
The content can be observed by the output
A.J. Han Vinck |
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FF-Timing revisited
clk Q‘
time
We reconsider the timing for flip-flops
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The signal x(t) must be present when the clock has a rising edge
A.J. Han Vinck |
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FF-Timing example
clk Q‘
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The collective content of the flip-flops
is also called the state of the machine
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The signal s0(t) = s1(t-1) |
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1 out(t) |
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A.J. Han Vinck |
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