Chapter 3: Stacked Silicon Interconnect (SSI)
The tools normally take this limit on propagation into account. To ensure that designs route properly and meet your design goals, you must also take this limit into account when you build a very long DSP cascade and manually place such logic near SLR boundaries; and when you specify a pinout for the design.
Master Super Logic Region (SLR)
Every SSI device has a single master SLR. In all SSI devices, SLR1 is the master SLR.
The master SLR contains the primary configuration logic that initiates configuration of the device and all other SLR components.
The master SLR is the only SLR that contains dedicated circuitry such as:
•DEVICE_DNA
•USER_EFUSE
•XADC
To access this circuitry, place associated pins or logic into the SLR when manually constraining pins or logic to the device. When using these components, the place and route
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SSI Components
tools can assign associated pins and logic to the appropriate SLR. In general, no additional intervention is required.
-ASTER 3,2
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Figure 3-7: Master SLR in an xc7v2000t Device
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