Chapter 2

Large FPGA Device Methodology

The synthesis and implementation tools must make optimal use of the fixed resources of the FPGA device.

In order to accomplish this goal, this guide presents a large FPGA device methodology that includes specific:

•Coding styles

•Implementation methods

•Design techniques

Benefits

Because of exponential FPGA device growth, many traditional coding styles and implementation methods are no longer adequate to achieve your design goals, including utilization, performance, and power.

The Xilinx® large FPGA device methodology allows your design to achieve optimal device and design characteristics, such as:

•Routing Utilization

•Design Performance

•Power Consumption

This methodology also allows you to achieve efficiencies in:

•Software runtime

•Debugging capability

•Portability

Inefficiencies in the code or implementation can seriously hinder achieving your design goals. While this is true for any size design or device, it is especially true of designs targeting large devices.

Most of the topics discussed in this guide are not new, nor are they unique to large FPGA devices. However, by applying these methods to your next large FPGA design, you will be more likely to meet or even surpass your design goals.

UG872 (v14.3) October 16, 2012