Chapter 2: Large FPGA Device Methodology

Routing Utilization

Routing in FPGA devices is a fixed and finite resource.

Mismanagement of routing resources can negatively impact FPGA design characteristics, such as:

•Resource utilization

•The ability to meet performance goals

•The ability to meet or reduce power

Use of routing is directly correlated to:

•System level design choices

•Design entry

•Coding styles

•Implementation and debugging methods

Figure 2-1: As density increases, more effort is required to achieve high utilization in large FPGA devices.

Consequences of Inefficient Use of Routing Resources

Choices leading to inefficient use of routing resources can cause routing congestion and limit routing choices for the tools. This can result in:

•Additional routing capacitance (which increases power)

•Additional delay (which affects performance)

•Inability (in the worst cases) to completely route the design in the device