Chapter 1
Introduction
This guide addresses designs targeting large FPGA devices. This guide includes, but is not limited to, designs using Stacked Silicon Interconnect (SSI) technology.
Design Strategies
This guide details strategies for:
•System level planning
•Design creation
•Implementation
•Analysis
As discussed in Chapter 2, Large FPGA Device Methodology, these strategies can help you achieve optimal results from your large FPGA devices with respect to:
•Routing Utilization
•Design Performance
•Power Consumption
•Project Costs
Large FPGA Devices
The term large FPGA device is an ever-changing expression. As used in this guide, large FPGA device means the larger devices in the Xilinx® Virtex®-6 and Virtex-7 device families.
As illustrated in the following figure, device capacity increases significantly with each new FPGA device family.
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Figure 1-1: FPGA capacity has increased over 6x in less than 5 years
Today’s largest FPGA devices typically contain:
•Over 1 million 6-input LUTs
•Over 2 million registers
•Thousands of block RAM components and DSP blocks
•Over 1000 general purpose I/O components
•Up to 96 multi-Gigabit Transceivers (GT)
•Many other functions and resources
This leap in capability allows for larger system integration onto fewer chips, or even onto a single chip.
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SSI Technology
SSI Technology
The Virtex-7 FPGA devices with the highest capacity and capability are created using a manufacturing process known as Stacked Silicon Interconnect (SSI) technology.
When targeting Virtex-7 devices that use SSI, many of the same tools, techniques, and methods apply that are used in any large FPGA design. However, because of the specifics of the Virtex-7 architecture, some additional considerations are required.
For more information, see Chapter 3, Stacked Silicon Interconnect (SSI).
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UG872 (v14.3) October 16, 2012 |