PROGRAMMING WITH THE X87 FPU
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1st Instruction Byte |
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2nd Instruction Byte |
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2 |
0 |
7 |
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10 |
8 7 |
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x87 FPU Opcode Register |
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Figure 8-8. Contents of x87 FPU Opcode Registers
The fopcode compatibility mode should be enabled only when x87 FPU floating-point exception handlers are designed to use the fopcode to analyze program performance or restart a program after an exception has been handled.
8.1.10Saving the x87 FPU’s State with FSTENV/FNSTENV and FSAVE/FNSAVE
The FSTENV/FNSTENV and FSAVE/FNSAVE instructions store x87 FPU state information in memory for use by exception handlers and other system and application software. The FSTENV/FNSTENV instruction saves the contents of the status, control, tag, x87 FPU instruction pointer, x87 FPU operand pointer, and opcode registers. The FSAVE/FNSAVE instruction stores that information plus the contents of the x87 FPU data registers. Note that the FSAVE/FNSAVE instruction also initializes the x87 FPU to default values (just as the FINIT/FNINIT instruction does) after it has saved the original state of the x87 FPU.
The manner in which this information is stored in memory depends on the operating mode of the processor (protected mode or real-address mode) and on the operandsize attribute in effect (32-bit or 16-bit). See Figures 8-9 through 8-12. In virtual8086 mode or SMM, the real-address mode formats shown in Figure 8-12 is used. See Chapter 24, “System Management,” of the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3B, for information on using the x87 FPU while in SMM.
The FLDENV and FRSTOR instructions allow x87 FPU state information to be loaded from memory into the x87 FPU. Here, the FLDENV instruction loads only the status, control, tag, x87 FPU instruction pointer, x87 FPU operand pointer, and opcode registers, and the FRSTOR instruction loads all the x87 FPU registers, including the x87 FPU stack registers.
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PROGRAMMING WITH THE X87 FPU
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32-Bit Protected Mode Format |
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Control Word |
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Status Word |
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Tag Word |
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FPU Instruction Pointer Offset |
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Opcode 10...00 |
FPU Instruction Pointer Selector |
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FPU Operand Pointer Offset |
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20 |
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FPU Operand Pointer Selector |
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For instructions that also store x87 FPU data registers, the eight 80-bit registers (R0-R7) follow the above structure in sequence.
Figure 8-9. Protected Mode x87 FPU State Image in Memory, 32-Bit Format
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32-Bit Real-Address Mode Format |
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Control Word |
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Status Word |
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Tag Word |
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FPU Instruction Pointer 15...00 |
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FPU Instruction Pointer 31...16 |
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Opcode 10...00 |
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16 |
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FPU Operand Pointer 15...00 |
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FPU Operand Pointer 31...16 |
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24 |
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For instructions that also store x87 FPU data registers, the eight 80-bit registers (R0-R7) follow the above structure in sequence.
Figure 8-10. Real Mode x87 FPU State Image in Memory, 32-Bit Format
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PROGRAMMING WITH THE X87 FPU |
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16-Bit Protected Mode Format |
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Control Word |
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Status Word |
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Tag Word |
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FPU Instruction Pointer Offset |
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FPU Instruction Pointer Selector |
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FPU Operand Pointer Offset |
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FPU Operand Pointer Selector |
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Figure 8-11. Protected Mode x87 FPU State Image in Memory, 16-Bit Format |
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16-Bit Real-Address Mode and |
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Virtual-8086 Mode Format |
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Control Word |
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Status Word |
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Tag Word |
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FPU Instruction Pointer 15...00 |
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IP 19..16 |
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Opcode 10...00 |
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FPU Operand Pointer 15...00 |
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OP 19..16 |
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Figure 8-12. Real Mode x87 FPU State Image in Memory, 16-Bit Format
8.1.11Saving the x87 FPU’s State with FXSAVE
The FXSAVE and FXRSTOR instructions save and restore, respectively, the x87 FPU state along with the state of the XMM registers and the MXCSR register. Using the FXSAVE instruction to save the x87 FPU state has two benefits: (1) FXSAVE executes faster than FSAVE, and (2) FXSAVE saves the entire x87 FPU, MMX, and XMM state in one operation. See Section 10.5, “FXSAVE and FXRSTOR Instructions,” for additional information about these instructions.
Vol. 1 8-17