TMS320VC5502
Fixed-Point Digital Signal Processor
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SPRS166J –APRIL 2001 –REVISED AUGUST 2006
5.16.3HPI.HAS Interrupt Timings
Table 5-47 assumes testing over recommended operating conditions (see Figure 5-46).
Table 5-47. HPI.HAS Interrupt Timing Requirements(1)
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VC5502-200 |
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NO. |
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VC5502-300 |
UNIT |
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MIN MAX |
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H31 |
t |
su(HASL-COH) |
Setup time, HPI.HAS low(2) |
before CLKOUT rising edge |
5 |
ns |
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H32 |
t |
h(COH-HASL) |
Hold time, HPI.HAS low(2) |
after CLKOUT rising edge |
0 |
ns |
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H33 |
t |
w(HASL) |
Pulse width, HPI.HAS low(2) |
P(3) |
ns |
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(1)In this case, CLKOUT reflects SYSCLK1. The CLKOUT Selection Register (CLKOUTSR) can be programmed to select SYSCLK1 as CLKOUT.
(2)An interrupt can be triggered by setting the HPI.HAS signal high or low, depending on the setting of the HAS bit in the General-Purpose I/O Interrupt Control Register 2 (HPGPIOINT2). Refer to the TMS320VC5501/5502 DSP Host Port Interface (HPI) Reference Guide
(literature number SPRU620) for more information on the interrupt capability of the HPI.HAS signal.
(3)P = (Divider1 Ratio)/(CPU Clock Frequency) in ns. For example, when running parts at 300 MHz with the fast peripheral domain at 1/2 the CPU clock frequency, use P = 2/300 MHz = 6.66 ns.
CLKOUT
H31 
H32
H33
HPI.HAS
Figure 5-46. HPI.HAS Interrupt Timings
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