Functional Overview

2.2.9Synchronizing registers and logic

The PrimeCell SCI supports both asynchronous and synchronous operation of the clocks, PCLK and SCICLK. Synchronization registers and handshaking logic have been implemented, and are active at all times. This has a minimal impact on performance or area. Synchronization of control signals is performed on both directions of data flow, that is from the PCLK to the SCICLK domain, and from the SCICLK to the PCLK domain.

2.2.10Test registers and logic

There are registers and logic for functional block verification, and integration testing using TicTalk or code based vectors.

Test registers must not be read or written to during normal use.

The integration testing verifies that the SCI has been wired into a system correctly. It enables each input and output to be both written to and read.