Functional Overview

2.3.13Parity error

If character-transmit handshaking is enabled (RXNAK = 1) and the interface detects a parity error, it signals this to the card by pulling the input/output line down for 2 etus at 10.5 etus after the leading edge of the start bit.

The maximum number of times the interface attempts to receive a character is governed by the SCIRETRY register. If, after RXRETRY further attempts, the character has not be successfully received, a parity error for the character is flagged. Bit [8] of the SCIDATA register is set to 1 to indicate that a parity error has occurred.

2.3.14RXREAD interrupt

An RXREAD interrupt is caused by a read access timeout (defined by SCIRXTIME). This occurs if the receive FIFO contains at least one character, and no characters have been read for a time corresponding to SCIRXTIME Smart Card clock cycles.

The read access timeout limit can be reprogrammed dynamically, which provides a way of enabling the receive timeout mechanism only at the end of blocks. This is achieved by initially setting the receive timeout threshold to a high enough value to guarantee that an RXREAD interrupt can only have been caused by a tide mark condition (excluding an error condition where a card stops transmitting part way through a block). When the end of the block is reached, RXTIME is reprogrammed with the correct value to process the trailing characters in the block.