Data EEPROM Programming

is available as separate ICs that can be placed on the circuit board and accessed through PIC ports. For example, the Microchip 24LC04B EEPROM IC is a 4K electrically erasable PROM with a 2-wire serial interface that follows the I2C convention. Programming serial EEPROM ICs is also covered in this chapter.

15.0 PIC Internal EEPROM Memory

Some PICs contain internal EEPROM data memory that is accessible to code. The amount of memory and the access mechanism varies from PIC to PIC. In fact, the mapping and access mechanisms varies even in devices belonging to the same family. In the sections that follow, we describe EEPROM data memory in the context of two different PICs of the mid-range family: the 16F84 and the 16F877.

15.0.1 EEPROM Programming on the 16F84

The 16F84 and 16F84A contain 64 bytes of EEPROM data memory. This memory is both readable and writable during normal operation. It is not mapped in the register file space, but is indirectly addressed through the Special Function Registers EECON1, EECON2, EEDATA, and EEADR. The address of EEPROM memory starts at location 0x00 and extends to the maximum contained in the PIC, in this case, 0x3f. The following registers relate to EEPROM operations:

1.EEDATA holds the data byte to be read or written.

2.EEADR contains the EEPROM address to be accessed by the read or write operation.

3.EECON1 contains the control bits for EEPROM operations.

4.EECON2 protects EEPROM memory from accidental access. This is not a physical register.

Figure 15-1 shows the bitmap of the EECON1 register in the 16F84.

The CPU continues to access EEPROM memory even if the device is code protected, but in this case the device programmer can not access EEPROM memory.

Reading EEPROM Data Memory on the 16F84

Reading an EEPROM data memory location in the 16F84 requires the following operations:

1.Bank 0 is selected and the address of the memory to be read is stored in the EEADR register.

2.Bank 1 is selected and the RD bit is set in the EECON1 register.

3.Bank 0 is selected and data is read from the EEDATA register.

The following procedure returns in the w register the data stored at the specified EEPROM memory address.

;==============================

;read EEPROM 16F84 ;==============================

;Procedure to read EEPROM memory. Address of memory

;location to read is stored in local register EEMemAdd

Figure 15-1 16F84 EECON1 Register Bit Map

; On exit: read data in w EERead:

16F84 EEPROM Data Memory Write

Writing to 16F84 EEPROM data memory consists of the following operations:

1.Bank 0 is selected and the address of the desired memory location is stored in the EEADR register.

2.The value to be written is stored in the EEDATA register.

3.Bank 1 is selected, interrupts are disabled, and the write enable bit (WREN) is set in the EECON1 register.

4.The special values 0x55 and 0xaa are written consecutively to the EECON2 register.

5.The WR bit is set in the EECON1 register. The EEPROM write takes place automatically after the WR bit is set.

6.Interrupts are re-enabled and bank 0 is selected.

The following procedure shows the processing for the EEPROM write.

;==============================

;write EEPROM ;==============================

;Procedure to write asc1 byte to EEPROM memory

;Address to write stored in local register EEMemAdd

;Data byte to write is in local register EEByte EEWrite:

;Load byte to write into EE data register

Microchip documentation recommends that critical applications should verify the write operation by reading EEPROM memory after the write operation has taken place in order to make sure that the correct value was stored.

16F84 EEPROM Demonstration Program

The program EECounter, in the book’s online software, is a demonstration of EEPROM memory access on the 16F84 PIC. The program keeps track of the number of times that the code has executed by storing each iteration in EEPROM data memory. The program uses the circuit shown in Figure 15-2 (see following page).

The EECounter program increments the value stored at EEPROM address 0x00 at every iteration and displays the result on the first LCD line. The following procedure is used to convert the binary value in EEPROM to 3 ASCII digits for display.

;same manner to determine the decimal tenths result.

;The final remainder is the decimal units result.

;Variables:

;asc100 storage for hundreds position result

15.0.2 EEPROM Programming on the 16F87x

The 16F87x PICs contain 128 or 256 bytes of EEPROM data memory. As in the 16F84, this memory is both readable and writable during normal operation. It is not mapped in the register file space but is indirectly addressed through Special Function Registers, as described later in this section.

In the 16F87x PICs both data EEPROM and flash Program Memory are readable and writable during normal operation. For data EEPROM memory, read and write operations take place one byte at a time. The write operation performs an erase-then-write cycle. No bulk erase function is available to user code.

The following Special Function Registers are used in 16F87x EEPROM data read and write operations:

1.EEDATA holds the data byte to be read or written.

2.EEADR contains the EEPROM address to be accessed by the read or write operation.

3.EECON1 contains the control bits for EEPROM operations.

4.EECON2 protects EEPROM memory from accidental access. This is not a physical register.

EEPROM data memory read and write operations do not interfere with normal PIC operations. The 16F873 and 16F874 PICs have 128 bytes of EEPROM data memory. These ICs require that the most-significant-bit of EEADR remains clear. The EEPROM data memory on these devices does not wrap around; that is, accessing EEPROM address 0x80 does not map to 0x00. The 16F876 and 16F877 devices have 256 bytes of EEPROM data memory. In these devices all 8-bits of the EEADR are used. Figure 15-3 (in the following page) is a bit map of the EECON1 register in the 16F87x.

The 16F87x EECON1 register contains one additional bit that is not present in the 16F84, named EEPGD. This bit determines if the EEPROM operation accesses program or data memory. When clear, any subsequent operations relate to EEPROM data. Otherwise, the operation accesses program memory. Read operations only require the RD bit, which initiates the read from the selected memory location. The RD bit is automatically cleared at the end of the read operation. The data in the selected memory location can be read in the EEDATA register as soon as the RD bit is set.

Figure 15-3 16F87x EECON1 Register Bitmap

Write operations require two control bits, WR and WREN, and two status bits, WRERR and EEIF. The purpose of these bits is shown in Figure 15-3. Since the WREN bit enables or disables the write operation, it must be set before executing a write. The WR bit is used to initiate the write operation. This bit is automatically cleared at the end of the write. The interrupt flag bit EEIF can be use to detect when the memory write completes. The EEIF bit must be cleared by software before setting the WR bit. As soon as the WREN bit and the WR bit have been set, the desired memory address in EEADR is erased and the value in EEDATA written to the selected address.

The WRERR bit indicates when the 16F87x has been reset during a write operation. This bit should be cleared after power-on reset. The WRERR bit is set when a write operation is interrupted by a MCLR reset, or a Watchdog time-out.

Reading EEPROM Data Memory on the 16F87x

Reading an EEPROM data memory location in the 16F87x requires the following operations:

1.Write the address of the EEPROM location to be read to the EEDATA register. The address should be within the device’s memory capacity.

2.The EEPGD bit in the EECON1 registered is cleared so as to access data memory.

3.The RD bit in the EECON1 register is set to start the read operation.

4.The data can now be read from the EEDATA register.

The following code fragment shows reading EEPROM data memory in the 16F877 PIC:

;==============================

;16F877 read EEPROM data ;==============================

;Procedure to read EEPROM on-board memory

;ON ENTRY:

;Address of EEPROM memory location to read is stored in

;local register EEMemAdd

;ON EXIT:

;Read data in w

EERead:

Writing to EEPROM Data Memory in the 16F87x

Writing to 16F87x EEPROM data memory is more complex than on the 16F84 and much more complex than the read operation. The process consists of the following operations:

1.Make sure that a previous write operation is not in progress. This step is not necessary if write completion is checked at the end of the write routine.

2.The address to be accessed is stored in the EEADR register. Code should make certain that the address is within the device’s range.

3.The data to be written is stored in the EEDATA register.

4.The EEPGD bit in the EECON1 register is cleared to select data memory access.

5.The WREN bit in the EECON1 register is set to enable the write function.

6.Interrupts are disabled to make sure the operation is not interrupted.

7.Three special operations are now executed:

The value 0x55 is written to the EECON2 register.

The value 0xaa is written to the EECON2 register.

The WR bit in the EECON1 register is set.

8.Interrupts are enabled if the application uses interrupts.

9.The WREN bit is cleared to prevent accidental write operations.

10.The completion of the write operation can be ascertained either by checking that the WR bit is clear or that EEIF interrupt flag bit is set.

The following code fragment is a procedure to write EEPROM data:

;==============================

;16F87x write EEPROM data ;==============================

;Procedure to write data byte to EEPROM memory

;ON ENTRY:

;Address to write stored in local register EEMemAdd

;Data byte to write is in local register EEByte EEWrite:

Bank3

Wait2Start:

goto wait2End

;Re-enable interrupts if program uses interrupts

;If not, comment out next line

GFR Access Issue in the 16F87x

Data memory space in the 16F87x is partitioned into four separate banks, labeled bank 0 to bank 3. The RP1 and RP0 bits in the Status register are used to select which one of the banks is currently accessible. In programming the Special Functions Registers it is necessary to find out on which bank a register is located to select it. The previous code fragment (the write EEPROM data procedure) requires three bank shifts since EEPROM special function registers are located in several banks.

In this context, we sometimes forget that in some PICs the user registers, also called the General Purpose Registers, can also be located in any one of the banks, although most applications locate the GPRs in bank 0. In the 16F87x there are 96 bytes of available space in bank 0 that can be used. So if the registers used by the application are allocated in this first bank (actually in the first 80 bytes of bank 0) then code must select bank 0 before accessing this data. Had this been the case, the preceding code fragment would have required four additional bank changes.

We were able to avoid this difficulty by placing the program GPRs in the bank 0 memory space from 0x70 to 0x7f. In the 16F87x, addresses 0x70 to 0x7f (15 bytes) are mirrored in the other three banks. In contrast, any GPR allocated below address 0x70 in bank 0 can be accessed only when bank 0 is selected. The 16x84 programmer may not be aware of this fact, since in the 16F84, the memory area available for GPRs, although physically located in bank 0, is mirrored in bank 1.

In the 16F87x, it is good programming practice to locate the most used GPRs in the 0x70 to 0x7f area so as to avoid unnecessary bank changes. Since the space is limited to 15 bytes, the programmer must exercise good judgment in deciding which registers to place in this area.

15.0.3 16F87x EEPROM Circuit and Program

The program Ser2EEP, in the book’s online software, is a demonstration of EEPROM memory access on the 16F877 PIC. The program receives character data through the RS-232 line and stores them in EEPROM data memory. Received characters are echoed on the second LCD line. When the <Enter> key is detected, the text stored in EEPROM memory is displayed on the LCD. On startup, the top LCD line displays the prompt: “Receiving:”. At that time, a message “Rdy-” is sent through the serial line so as to test the connection. Serial communications run at 2400 baud, no parity, 1 stop bit, and 8 character bits. Figure 15-4 (in the following page) shows the circuit used by the Ser2EEP program.

R/W

Figure 15-4 Circuit for the Ser2EEP Demonstration Program

The program’s main driver routine, constants, and user registers are as follows:

;============================================================

; M A C R O S

;============================================================ ; Macros to select the register banks

;=====================================================

; constant definitions

; for PIC-to-LCD pin wiring and LCD line addresses ;=====================================================

#define LCDlimit .20; Number of characters per line #define spbrgVal .64; For 2400 baud on 10Mhz clock

;Note: The constants that define the LCD display

;line addresses have the high-order bit set

;so as to meet the requirements of controller

;commands.

;

;========================================================== ; General Purpose Variables ;==========================================================

;Local variables

;Reserve 20 bytes for string buffer cblock 0x20

strData endc

;Other data

;==============================

;Common RAM area ;==============================

;These GPRs can be accessed from any bank.

;15 bytes are available, from 0x70 to 0x7f

;============================================================

; P R O G R A M

;============================================================

;Wiring:

;LCD data to Port-D, lines 0 to 7

;E line -> Port-E, 1

;RW line -> Port-E, 2

;RS line -> Port-E, 0

;Set PORTE D and E for output

;First, initialize Port-B by clearing latches clrf STATUS

clrf PORTB

;Select bank 1 to TRIS Port-D for output Bank1

;TRIS Port-D for output. Port-D lines 4 to 7 are wired

;to LCD data lines. Port-D lines 0 to 4 are wired to LEDs. movlw b’00000000’

;By default Port-A lines are analog. To configure them

;as digital code must set bits 1 and 2 of the ADCON1

;register (in bank 1)

; Port-B, lines are wired to keypad switches, as follows:

;7 6 5 4 3 2 1 0

;| | | | |_|_|_|_____ switch rows (output)

;|_|_|_|_____________ switch columns (input)

;rows must be defined as output and columns as input

; Enable Port-B pullups for switches in OPTION register

;Back to bank 0 Bank0

;Initialize serial Port-for 2400 baud, 8 bits, no parity

;1 stop

;============================================================

;receive serial data, store, and display ;============================================================ receive:

;Call serial receive procedure

call SerialRcv

;HOB of newData register is set if new data

;received

; Check for <Enter> key (0x0d) and execute display function

;============================

;display EEPROM data ;============================

;This routine receives control when the <Enter> key is

;received.

;Action:

;1. Clear LCD

;2. Output is set to top LCD line

;3. Characters stored in EEPROM are displayed

;until 0x0d code is detected

isEnter:

call clearLCD

; Clear character counter and line counter variables