1. Transmetamorphosis,tasks

Task1.Answer the following questions.

1.What was Transmeta’s great achievement?

2.What was the main obstacle in the way of creating a new chip?

3.How did Intel solve the problem?

4.What is wrong with this approach?

5.What makes Transmeta’s approach different?

6.What arew its advantages?

7.Where can Transmeta’s chip be used?

Task2. Say whether the following is true, false,or isn’t mentioned?

1.Transmeta’s chips must use programs specially written for them;

2.They are more economical than their Intel counterparts;

3.While creating new chnips their developers have to solve two mutually exclusive problems: performance rate and the opportunity to use programs written for other chips;

4.Transmeta’s chip takes instructions from the whole of software and divides them into microoperations;

5.In the new approach this option is performed by software.

6.New programming techniques allow us to increase performance without any effort making the above problems obsolete.

7.The new approach can greatly reduce power consumption.

8.Gradually the new chip will force Intel out of the market for portables.

9.Portable devices seem to be the only niche for the new chip.

Old tricks for new chips

Two venerable chip-design techniques, multi-threading and asynchronous logic, are finally on their way to widespread adoption

COMPUTING is similar to cookery. Programs, like recipes, are lists of instructions to be carried out. The raw materials are data which, like vegetables and other ingredients, must be sliced and diced in exactly the right way. Those ingredients must be turned into palatable output as quickly as possible. And in both cases, changes in organisational procedures can produce huge gains in efficiency.

Over the years, the designers of microprocessors have resorted to all sorts of tricks to make their products run faster. Modern chips, for example, queue up several instructions in a “pipeline” and analyse them to see if switching the order in which they are executed can produce the correct result, only more quickly. Similarly, if a recipe says “chop the garlic and heat the stock”, a time-saving chef will start heating the stock first, and then chop the garlic while waiting.

Doing this kind of analysis is worthwhile only if the increase in the complexity of the chip’s design that it requires provides a significant performance boost. Faced with diminishing returns, however, chip designers are dusting down two technologies—called multi-threading and asynchronous logic—that were both invented decades ago. At the time, neither was competitive with conventional designs, but important uses have since emerged for each of them. Multi-threading can increase the performance of database- and web-servers, while asynchronous logic is ideal for wireless devices and smartcards. As a result, both technologies are now heading towards the marketplace.

1. It slices, it dices

The idea of multi-threading goes back to the 1960s, and its use in supercomputers has been championed by Burton Smith, the chief scientist at Cray, a supercomputer maker. In 1995 Susan Eggers, Hank Levy and Dean Tullsen at the University of Washington showed how the idea could be applied to mass-market microprocessors, in a technique called “simultaneous multi-threading” (SMT). What makes SMT particularly clever is that a small increase in a chip’s complexity results in a vast improvement in its performance, with one proviso: the gain comes when

the chip is running lots of programs at once. In practice, though, all modern computers do this—users expect, for example, to be able to run a web browser and a word processor while listening to an MP3 music file. Strictly speaking, these programs are not actually operating at the same time. Instead, a single processor runs one program for a few milliseconds, then switches to another. But this switching happens so quickly that the user is fooled into thinking that all the programs are working simultaneously.

Inside the processor, this switching between programs looks a lot less slick. Switching involves storing the “processor state” for the outgoing program (that is, the configuration of the functional units that do the actual calculations), restoring the processor state for the incoming program, and then resuming operation. This is rather like a chef preparing (say) eight recipes at once by working on each for (say) three minutes at a time, and then switching recipes. Every time he switches, he has to forget the old recipe, re-read the new one, and move all of the ingredients on and off his chopping board.

SMT works by giving the chef a larger chopping board and allowing him to interleave steps from all eight recipes, while still ensuring that the peas end up in the pea soup. An SMT chip keeps track of several programs, or “threads”, at once. Doing so requires extra hardware to store the processor state for each thread, and when instructions are added to the queue, they must be labelled as coming from a particular thread. That way, when an instruction is sent to one of the various number-crunching units on the chip, it knows which thread’s state to update with the result.

Engineers at Compaq, an American computer maker, have estimated that only about 10% more circuitry is needed to enable a conventional chip design to support four threads at once in this way. But the improvements in performance can be spectacular, because when one of the threads is held up waiting for data to arrive, the others can keep running. Database- and web-servers generally create a separate thread for each user request—so the ability to run several threads simultaneously is a particular advantage for them. Simulations run by Dr Eggers’s team have found that an eight-thread SMT chip could run database software three times faster than a conventional chip, and web-server software four times faster. And those figures, says Dr Eggers, are for unmodified software. Tweaking the programs to support SMT explicitly could, she suggests, speed things up even more.