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THS4631 |
SLOS451C – DECEMBER 2004 – REVISED MARCH 2025 |
When determining whether or not the device satisfies the maximum power dissipation requirement, consider not only quiescent power dissipation, but also dynamic power dissipation. Often, this dynamic dissipation is difficult to quantify because the signal pattern is inconsistent, but an estimate of the RMS power dissipation can provide visibility into a possible problem.
8.4.2 Layout Example
Although there are many ways to properly dissipate heat in the PowerPAD integrated circuit package, the following steps illustrate the recommended approach.
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0.205 |
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0.060 |
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0.017 |
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PIN 1 |
0.013 |
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0.030 |
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0.075 |
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0.025 |
0.094 |
0.010 |
0.035 |
0.040 |
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VIAS |
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TOP VIEW
Figure 8-14. DGN PowerPAD™ Integrated Circuit Package PCB Etch and Via Pattern
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0.300 |
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0.100 |
0.026 |
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0.035 |
0.010 |
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Pin 1 |
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0.030 |
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0.060 |
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0.140 |
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0.050 |
0.176 |
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0.060 |
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0.035
0.080
0.010 vias
All Units in Inches
Top View
Figure 8-15. DDA PowerPAD™ Integrated Circuit Package PCB Etch and Via Pattern
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