OPCODE MAP

A.2 KEY TO ABBREVIATIONS

Operands are identified by a two-character code of the form Zz. The first character (Z) specifies the addressing method; the second character (z) specifies the type of operand.

A.2.1 Codes for Addressing Method

The following abbreviations are used for addressing methods:

ADirect address. The instruction has no ModR/M byte; the address of the operand is encoded in the instruction; no base register, index register, or scaling factor can be applied (for example, far JMP (EA)).

CThe reg field of the ModR/M byte selects a control register (for example, MOV (0F20, 0F22)).

DThe reg field of the ModR/M byte selects a debug register (for example, MOV (0F21,0F23)).

EA ModR/M byte follows the opcode and specifies the operand. The operand is either a general-purpose register or a memory address. If it is a memory address, the address is computed from a segment register and any of the following values: a base register, an index register, a scaling factor, or a displacement.

FEFLAGS register.

GThe reg field of the ModR/M byte selects a general register (for example, AX (000)).

IImmediate data. The operand value is encoded in subsequent bytes of the instruction.

JThe instruction contains a relative offset to be added to the instruction pointer register (for example, JMP (0E9), LOOP).

MThe ModR/M byte may refer only to memory: mod != 11B (BOUND, LEA, LES, LDS, LSS, LFS, LGS, CMPXCHG8B, LDDQU).

NThe R/M field of the ModR/M byte selects a packed quadword MMX technology register.

OThe instruction has no ModR/M byte; the offset of the operand is coded as a word or double word (depending on address size attribute) in the instruction. No base register, index register, or scaling factor can be applied (for example, MOV (A0–A3)).

PThe reg field of the ModR/M byte selects a packed quadword MMX technology register.

QA ModR/M byte follows the opcode and specifies the operand. The operand is either an MMX technology register or a memory address. If it is a memory address, the address is computed from a segment register and any of the following values: a base register, an index register, a scaling factor, and a displacement.

RThe mod field of the ModR/M byte may refer only to a general register (for example, MOV (0F20-0F24, 0F26)).

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OPCODE MAP

SThe reg field of the ModR/M byte selects a segment register (for example, MOV (8C,8E)).

TThe reg field of the ModR/M byte selects a test register (for example, MOV (0F24,0F26)).

UThe R/M field of the ModR/M byte selects a 128-bit XMM register.

VThe reg field of the ModR/M byte selects a 128-bit XMM register.

WA ModR/M byte follows the opcode and specifies the operand. The operand is either a 128-bit XMM register or a memory address. If it is a memory address, the address is computed from a segment register and any of the following values: a base register, an index register, a scaling factor, and a displacement

XMemory addressed by the DS:(E)SI or by RSI (for example, MOVS, CMPS, OUTS, or LODS). In 64-bit mode, only 64-bit (RSI) and 32-bit (ESI) address sizes are supported. In non-64-bit mode, only 32-bit (ESI) and 16-bit (SI) address sizes are supported.

YMemory addressed by the ES:(E)DI or by RDI (for example, MOVS, CMPS, INS, STOS, or SCAS). In 64-bit mode, only 64-bit (RDI) and 32-bit (EDI) address sizes are supported. In non-64-bit mode, only 32-bit (EDI) and 16-bit (DI) address sizes are supported.

A.2.2 Codes for Operand Type

The following abbreviations are used for operand types:

aTwo one-word operands in memory or two double-word operands in memory, depending on operand-size attribute (used only by the BOUND instruction).

bByte, regardless of operand-size attribute.

cByte or word, depending on operand-size attribute.

dDoubleword, regardless of operand-size attribute.

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