- •V. Ya. Krakovsky, m. B. Fesenko
- •In Computer Systems and Networks
- •Contents
- •Preface
- •Introduction
- •Module I. Basic Components of Digital Computers
- •1. The Structure of a Digital Computer
- •1.1. Introduction to Digital Computers
- •Questions for Self-Testing
- •1.2. The Computer Work Stages Implementation Sequence
- •Questions for Self-Testing
- •1.3. Register Gating and Timing of Data Transfers
- •Questions for Self-Testing
- •1.4. Computer Interface Organization
- •Questions for Self-Testing
- •1.5. Computer Control Organization
- •Questions for Self-Testing
- •1.6. Function and Construction of Computer Memory
- •Questions for Self-Testing
- •1.7. Architecturally-Structural Memory Organization Features
- •Questions for Self-Testing
- •2. Data processing fundamentals in digital computers
- •2.1. Element Base Development Influence on Data Processing
- •Questions for Self-Testing
- •2.2. Computer Arithmetic
- •Questions for Self-Testing
- •2.3. Operands Multiplication Operation
- •Questions for Self-Testing
- •2.4. Integer Division
- •Questions for Self-Testing
- •2.5. Floating-Point Numbers and Operations
- •Questions for Self-Testing
- •Questions for Self-Testing on Module I
- •Problems for Self-Testing on Module I
- •Module II. Digital computer organization
- •3. Processors, Memory, and the Evolution System of Instructions
- •3.1. Cisc and risc Microprocessors
- •Questions for Self-Testing
- •3.2. Pipelining
- •Questions for Self-Testing
- •3.3. Interrupts
- •Questions for Self-Testing
- •3.4. Superscalar Processing
- •Questions for Self-Testing
- •3.5. Designing Instruction Formats
- •Questions for Self-Testing
- •3.6. Building a Stack Frame
- •Questions for Self-Testing
- •4. The Structures of Digital Computers
- •4.1. Microprocessors, Microcontrollers, and Systems
- •Questions for Self-Testing
- •4.2. Stack Computers
- •Questions for Self-Testing
- •Questions for Self-Testing
- •4.4. Features of Organization Structure of the Pentium Processors
- •Questions for Self-Testing
- •4.5. Computers Systems on a Chip
- •Multicore Microprocessors.
- •Questions for Self-Testing
- •4.6. Principles of Constructing Reconfigurable Computing Systems
- •Questions for Self-Testing
- •4.7. Types of Digital Computers
- •Questions for Self-Testing
- •Questions for Self-Testing on Module II
- •Problems for Self-Testing on Module II
- •Module III. Parallelism and Scalability
- •5. Super Scalar Processors
- •5.1. The sparc Architecture
- •Questions for Self-Testing
- •5.2. Sparc Addressing Modes and Instruction Set
- •Questions for Self-Testing
- •5.3. Floating-Point on the sparc
- •Questions for Self-Testing
- •5.4. The sparc Computers Family
- •Questions for Self-Testing
- •6. Cluster Superscalar Processors
- •6.1. The Power Architecture
- •Questions for Self-Testing
- •6.2. Multithreading
- •Questions for Self-Testing
- •6.3. Power Microprocessors
- •Questions for Self-Testing
- •6.4. Microarchitecture Level Power-Performance Fundamentals
- •Questions for Self-Testing
- •6.5. The Design Space of Register Renaming Techniques
- •Questions for Self-Testing
- •Questions for Self-Testing on Module III
- •Problems for Self-Testing on Module III
- •Module IV. Explicitly Parallel Instruction Computing
- •7. The itanium processors
- •7.1. Parallel Instruction Computing and Instruction Level Parallelism
- •Questions for Self-Testing
- •7.2. Predication
- •Questions for Self-Testing
- •Questions for Self-Testing
- •7.4. The Itanium Processor Microarchitecture
- •Questions for Self-Testing
- •7.5. Deep Pipelining (10 stages)
- •Questions for Self-Testing
- •7.6. Efficient Instruction and Operand Delivery
- •Instruction bundles capable of full-bandwidth dispersal
- •Questions for Self-Testing
- •7.7. High ilp Execution Core
- •Questions for Self-Testing
- •7.8. The Itanium Organization
- •Implementation of cache hints
- •Questions for Self-Testing
- •7.9. Instruction-Level Parallelism
- •Questions for Self-Testing
- •7.10. Global Code Scheduler and Register Allocation
- •Questions for Self-Testing
- •8. Digital computers on the basic of vliw
- •Questions for Self-Testing
- •8.2. Synthesis of Parallelism and Scalability
- •Questions for Self-Testing
- •8.3. The majc Architecture
- •Questions for Self-Testing
- •8.4. Scit – Ukrainian Supercomputer Project
- •Questions for Self-Testing
- •8.5. Components of Cluster Supercomputer Architecture
- •Questions for Self-Testing
- •Questions for Self-Testing on Module IV
- •Problems for Self-Testing on Module IV
- •Conclusion
- •List of literature
- •Index and Used Abbreviations
- •03680. Київ-680, проспект Космонавта Комарова, 1.
Questions for Self-Testing
1. What approaches are used in designing instruction formats?
2. What are the peculiarities of three-, two-, and one-address instructions?
3. What properties are instruction formats characterized by?
4. What are the peculiarities of based addressing?
5. What are the differences between based addressing and indexed addressing?
6. How is indirect addressing performed?
7. Which of the two basic styles of call instruction uses more microprocessors?
8. How are procedure calls controlled in languages like Pascal, C?
9. What is the activation stack (the run-time stack) used for?
10. What problems occur in calling a recursive procedure?
3.6. Building a Stack Frame
In Pascal and other similar languages, a compiler must generate code so that each time a procedure is called during the execution of a program a stack frame is built for that procedure. Within that stack frame several important items are stored, each of which can generally be found at a fixed position within the frame. One of the things to be stored as a stack frame is being constructed is the return point of the procedure. In addition to the return point, space is allocated for the procedure's local variables and several other values that are both machine and language-dependent.
O
n
return from a procedure, the corresponding stack frame must be
removed from the stack. To keep track of the top position of the
stack, almost all microprocessors include a stack pointer register.
In addition, it is common, but not absolutely necessary, to have a
separate pointer called the frame
pointer,
which
points to the frame of the current stack. One of the additional items
that is stored in each stack frame is the previous value of the frame
pointer, so that
the frames are linked together in a list. For example, consider a procedure P in which, the local variables x1 and x2 are declared. Furthermore, suppose that within P there is a procedure Q in which the local variables y1 and y2 have been declared. The actual structure of the run time stack, as well as the actual layout of the stack frames for P and Q just after P has called Q, are shown in Fig. 3.12. We are assuming for this discussion that the stack builds down in memory. Although this is by far the most common approach, there are some processors that use the opposite convention and build up. In this picture, the return point for each procedure is the first item stored in each stack frame as the record is being constructed. It is either stored there automatically by the call instruction that is used to call Q, or, in the case where the call instruction puts the return point in the register, it is stored in the frame as one of the first actions of Q.
The second item that is pushed onto the stack is usually the previous value of the frame pointer, the frame pointer of the previous stack frame owned by the procedure that did the call. It is necessary to store this value so that when procedure Q returns to procedure P, the frame pointer can be restored so that it is once again pointing to the correct place. The remainder of the stack frame is used for the local variables.
While procedure Q is executing, the frame pointer will point to the location in the stack frame for Q used to store the old value of the frame pointer. Since we intend to allocate all local variables at fixed locations in this stack frame just below where the frame pointer points, we know that y1 can be found at an offset of 4 from the frame pointer and y2 can be found at an offset of 8 (assuming that the old frame pointer as well as y1 and y2 are 4-byte values). These days, stack-based languages, including C and Pascal, are in common use, and furthermore, they all support dynamic storage allocation. Modern CISC designs especially reflect anticipated use of more complicated addressing modes that arise from the use of a stack and dynamically allocated data.
Postfix notation. A stack processes data using postfix or inverse polish notation. Braces are absent in inverse polish notation, e.g., expression "(a + b) * (c - d) / sin(e)" is written as "a b + c d - * e sin /". Stack machines have been designed for direct executing of inverse polish notation. When analyzing a string, a variable is met it is pushed into the stack, and when a sign of mathematical operation is met, the necessary number of variables are popped from the stack, the operation is executed and the result is pushed into the stack. To the end of analyzing the string it is necessary only to pop the result from the stack.
