Лабораторная работа №3 / Laba_3 / Laba_3

// Binding File - DO NOT EDIT
// Binding written 25 Октябрь 2005 г. 23:02:09 MSD
// By FastChip Version 2.6.0 Build 030604-1706
// Binding last modified 25 Октябрь 2005 г. 23:02:09 MSD
V 1 2;
D A7S20;
OP CmdReg_A.bclk 886;
OP CmdReg_A.CMDREG 2257;
OP CmdReg_A.DATAWRITE0 918;
OP CmdReg_A.DATAWRITE1 917;
OP CmdReg_A.DATAWRITE2 916;
OP CmdReg_A.DATAWRITE3 915;
OP CmdReg_A.DFF0 17991;
OP CmdReg_A.DFF1 17992;
OP CmdReg_A.DFF2 17975;
OP CmdReg_A.DFF3 17976;
OP CmdReg_A.DMUX0 17990;
OP CmdReg_A.DMUX1 17988;
OP CmdReg_A.DMUX2 17970;
OP CmdReg_A.DMUX3 17968;
OP lpm_and_A.AND_WIDE4_0_0 17481;
OP lpm_and_A.AND_WIDE4_0_1 17609;
OP lpm_and_A.AND_WIDE4_0_2 17737;
OP lpm_and_A.AND_WIDE4_0_3 17865;
OP lpm_inv_A.inv_1 17978;
OP lpm_inv_A.inv_2 17977;
OP lpm_inv_A.inv_3 17994;
OP lpm_inv_A.inv_4 17993;
OP lpm_or_A.AND_WIDE4_0_0 17578;
OP Output_A.0 5816;
OP Output_A.1 3125;
OP CmdReg_A.CMDREG_b11c12_decode0 2161;
P CmdReg_A.bclk Root.sideBand.busclk;
P CmdReg_A.CMDREG Root.vbc13r9.vbrlb.decode0;
P CmdReg_A.DATAWRITE0 Root.sideBand.dataIn0;
P CmdReg_A.DATAWRITE1 Root.sideBand.dataIn1;
P CmdReg_A.DATAWRITE2 Root.sideBand.dataIn2;
P CmdReg_A.DATAWRITE3 Root.sideBand.dataIn3;
P CmdReg_A.DFF0 Root.bank1_1.x3y0.lb.regb;
P CmdReg_A.DFF1 Root.bank1_1.x3y0.lb.rega;
P CmdReg_A.DFF2 Root.bank1_1.x3y1.lb.regb;
P CmdReg_A.DFF3 Root.bank1_1.x3y1.lb.rega;
P CmdReg_A.DMUX0 Root.bank1_1.x3y0.lb.mux0;
P CmdReg_A.DMUX1 Root.bank1_1.x3y0.lb.mux1;
P CmdReg_A.DMUX2 Root.bank1_1.x3y1.lb.mux2;
P CmdReg_A.DMUX3 Root.bank1_1.x3y1.lb.mux3;
P lpm_and_A.AND_WIDE4_0_0 Root.bank1_1.x7y0.lb.lutb;
P lpm_and_A.AND_WIDE4_0_1 Root.bank1_1.x6y0.lb.lutb;
P lpm_and_A.AND_WIDE4_0_2 Root.bank1_1.x5y0.lb.lutb;
P lpm_and_A.AND_WIDE4_0_3 Root.bank1_1.x4y0.lb.lutb;
P lpm_inv_A.inv_1 Root.bank1_1.x3y1.lb.luta;
P lpm_inv_A.inv_2 Root.bank1_1.x3y1.lb.lutb;
P lpm_inv_A.inv_3 Root.bank1_1.x3y0.lb.luta;
P lpm_inv_A.inv_4 Root.bank1_1.x3y0.lb.lutb;
P lpm_or_A.AND_WIDE4_0_0 Root.bank1_1.x6y2.lb.luta;
P Output_A.0 Root.ioec34r13.iob.iocellb.pad;
P Output_A.1 Root.iosc32r1.iob.iocellb.pad;
P CmdReg_A.CMDREG_b11c12_decode0 Root.vbc13r17.vbrlb.decode0;