Electrical characteristics |
STM8S105xx |
10.3.5Memory characteristics
RAM and hardware registers
Table 36: RAM and hardware registers
Symbol |
Parameter |
Conditions |
Min |
Unit |
VRM |
Data retention mode (1) |
Halt mode (or reset) |
VIT-max(2) |
V |
Notes:
(1)Minimum supply voltage without losing data stored in RAM (in halt mode or under reset) or in hardware registers (only in halt mode). Guaranteed by design, not tested in production. refer to Section 7.10: "TIM1 - 16bit advanced control timer" for the value of VIT-max
(2)Refer to the Operating conditions section for the value of VIT-max
Flash program memory/data EEPROM memory
General conditions: TA = -40 to 125°C.
Table 37: Flash program memory/data EEPROM memory
Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Unit |
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|
(1) |
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VDD |
Operating voltage (all modes, |
fCPU ≤ 16 |
2.95 |
|
5.5 |
V |
|
execution/write/erase) |
MHz |
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tprog |
Standard programming time (including |
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6.0 |
6.6 |
ms |
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erase) for byte/word/block (1 byte/4 |
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bytes/128 bytes) |
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Fast programming time for 1 block (128 |
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3.0 |
3.3 |
ms |
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bytes) |
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terase |
Erase time for 1 block (128 bytes) |
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3.0 |
3.3 |
ms |
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NRW |
Erase/write cycles (2)(program memory) |
TA = +85 °C |
10 k |
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cycles |
|
Erase/write cycles(data memory) (2) |
TA = +125 ° |
300 |
1.0M |
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|
C |
k |
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tRET |
Data retention (program memory) after 10k |
TRET = 55° C |
20 |
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years |
|
erase/write cycles at TA = +85 °C |
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Data retention (data memory) after 10k |
TRET = 55° C |
20 |
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erase/write cycles at TA = +85 °C |
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Data retention (data memory) after 300 k |
TRET = 85° C |
1.0 |
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erase/write cycles at TA = +125 °C |
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IDD |
Supply current (Flash programming or |
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2.0 |
|
mA |
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erasing for 1 to 128 bytes) |
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Notes:
(1)Data based on characterization results, not tested in production.
(2)The physical granularity of the memory is 4 bytes, so cycling is performed on 4 bytes even when a write/erase operation addresses a single byte.
60/99 |
DocID14771 Rev 13 |
STM8S105xx |
Electrical characteristics |
10.3.6I/O port pin characteristics
General characteristics
Subject to general operating conditions for VDD and TA unless otherwise specified. All unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down resistor.
Table 38: I/O static characteristics
Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Unit |
||
VIL |
Input low level voltage |
|
VDD = 5 V |
-0.3 |
|
0.3 x |
V |
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VDD |
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VIH |
Input high level voltage |
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|
0.7 x |
|
VDD + |
V |
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VDD |
|
0.3 V |
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Vhys |
Hysteresis (1) |
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|
700 |
|
mV |
Rpu |
Pull-up resistor |
VDD = 5 V, VIN = VSS |
30 |
55 |
80 |
kΩ |
||
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||
tR, tF |
Rise and fall time(10 % - |
Fast I/Os load = 50 pF |
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35 (2) |
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90 %) |
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||
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Standard and high sink |
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125 (2) |
ns |
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I/Os load = 50 pF |
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||
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Fast I/Os load = 20 pF |
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20 (2) |
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Standard and high sink |
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50 (2) |
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I/Os load = 20 pF |
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Ilkg |
Input leakage current, |
VSS |
≤ VIN |
≤ VDD |
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±1.0 (3) |
µA |
|
analog and digital |
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Ilkg ana |
Analog input leakage |
VSS |
≤ VIN |
≤ VDD |
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±250 (3) |
nA |
|
current |
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||
Ilkg(inj) |
Leakage current in |
Injection current ±4 mA |
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±1.0 (3) |
µA |
||
|
adjacent I/O (3) |
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|
Notes:
(1)Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production.
(2)Data guaranteed by design.
(3)Data based on characterization results, not tested in production.
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61/99 |
Electrical characteristics |
STM8S105xx |
Figure 24: Typical VIL and VIH vs VDD @ 4 temperatures
Figure 25: Typical pull-up resistance vs VDD @ 4 temperatures
62/99 |
DocID14771 Rev 13 |
STM8S105xx |
Electrical characteristics |
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Figure 26: Typical pull-up current vs VDD @ 4 temperatures |
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1.The pull-up is a pure resistor (slope goes through 0).
Table 39: Output driving current (standard ports)
Symbol |
Parameter |
Conditions |
Min |
Max |
Unit |
VOL |
Output low level with four pins sunk |
IIO = 4 mA, |
|
1.0 (1) |
V |
|
|
VDD = 3.3 V |
|
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Output low level with eight pins sunk |
IIO= 10 mA, |
|
2.0 |
|
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VDD = 5 V |
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VOH |
Output high level with four pins sourced |
IIO = 4 mA, |
2.0 (1) |
|
V |
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VDD = 3.3 V |
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Output high level with eight pins sourced |
IIO = 10 mA, |
2.4 |
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VDD = 5 V |
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Notes:
(1) Data based on characterization results, not tested in production
Table 40: Output driving current (true open drain ports)
Symbol |
Parameter |
Conditions |
Max |
Unit |
VOL |
Output low level with two pins sunk |
IIO = 10 mA, VDD = 3.3 V |
1.5 (1) |
V |
|
|
IIO = 10 mA, VDD = 5 V |
1.0 |
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|
IIO = 20 mA, VDD = 5 V |
2.0 (1) |
|
Notes:
(1) Data based on characterization results, not tested in production
Table 41: Output driving current (high sink ports)
|
Symbol |
Parameter |
Conditions |
Min |
Max |
Unit |
|
VOL |
Output low level with four pins sunk |
IIO = 10 mA, |
|
1.1 (1) |
V |
|
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63/99 |