STM8S105xx |
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Electrical characteristics |
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positive and negative injected currents (instantaneous values). These results are based on characterization with |
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ΣIINJ(PIN) maximum current injection on four I/O port pins of the device. |
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Table 18: Thermal characteristics |
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Symbol |
Ratings |
Value |
Unit |
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TSTG |
Storage temperature range |
-65 to 150 |
°C |
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TJ |
Maximum junction temperature |
150 |
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10.3Operating conditions
The device must be used in operating conditions that respect the parameters in the table below. In addition, full account must be taken of all physical capacitor characteristics and tolerances.
Table 19: General operating conditions
Symbol |
Parameter |
Conditions |
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Min |
Max |
Unit |
fCPU |
Internal CPU clock |
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0 |
16 |
MHz |
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frequency |
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VDD/ |
Standard operating |
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2.95 |
5.5 |
V |
VDD_IO |
voltage |
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VCAP |
CEXT: capacitance of |
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470 |
3300 |
nF |
(1) |
external capacitor |
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ESR of external |
at 1 MHz |
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0.3 |
Ohm |
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capacitor |
(2) |
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ESL of external |
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15 |
nH |
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capacitor |
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PD(3) |
Power dissipation at TA |
44 and 48-pin devices, with output on |
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443 |
mW |
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= 85 °C for suffix 6or |
eight standard ports, two high sink |
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TA= 125° C for suffix 3 |
ports and two open drain ports |
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simultaneously (4) |
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32-pin package, with output on eight |
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360 |
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standard ports and two high sink ports |
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simultaneously (4) |
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TA |
Ambient temperature for |
Maximum power dissipation |
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-40 |
85 |
°C |
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6 suffix version |
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Ambient temperature for |
Maximum power dissipation |
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-40 |
125 |
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3 suffix version |
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TJ |
Junction temperature |
6 suffix version |
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-40 |
105 |
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range |
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3 suffix version |
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-40 |
130 |
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Notes:
(1)Care should be taken when selecting the capacitor, due to its tolerance, as well as the parameter dependency on temperature, DC bias and frequency in addition to other factors. The parameter maximum value must be respected for the full application range.
(2)This frequency of 1 MHz as a condition for VCAP parameters is given by design of internal regulator.
(3)To calculate PDmax(TA), use the formula PDmax = (TJmax - TA)/ΘJA (see Section 7.7: "Watchdog timers" ) with the value for TJmax given in the current table and the value for ΘJA given in Section 7.7: "Watchdog timers".
(4)Refer to Section 7.7: "Watchdog timers"
DocID14771 Rev 13 |
45/99 |
Electrical characteristics |
STM8S105xx |
Figure 11: fCPUmax versus VDD
Table 20: Operating conditions at power-up/power-down
Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Unit |
tVDD |
VDD rise time rate |
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2.0 (1) |
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∞ |
µs/V |
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VDD fall time rate |
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2.0 (1) |
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∞ |
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tTEMP |
Reset releasedelay |
VDD rising |
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1.7 (1) |
ms |
VIT+ |
Power-on reset threshold |
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2.65 |
2.8 |
2.95 |
V |
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VIT- |
Brown-out reset threshold |
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2.58 |
2.7 |
2.88 |
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VHYS(BOR) |
Brown-out reset hysteresis |
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70 |
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mV |
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Notes:
(1) Guaranteed by design, not tested in production.
10.3.1VCAP external capacitor
Stabilization for the main regulator is achieved connecting an external capacitor CEXT to the VCAP pin. CEXT is specified in the Operating conditions section. Care should be taken to limit the series inductance to less than 15 nH.
46/99 |
DocID14771 Rev 13 |