STM8S105xx |
Electrical characteristics |
10.1.5Loading capacitor
The loading conditions used for pin parameter measurement are shown in the following figure.
Figure 9: Pin loading conditions
10.1.6Pin input voltage
The input voltage measurement on a pin of the device is described in the following figure.
Figure 10: Pin input voltage
10.2Absolute maximum ratings
Stresses above those listed as ‘absolute maximum ratings’ may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Table 16: Voltage characteristics
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Symbol |
Ratings |
Min |
Max |
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Unit |
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VDDx - VSS |
Supply voltage (including VDDA and |
-0.3 |
6.5 |
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V |
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VDDIO) (1) |
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VIN |
Input voltage on true open drain |
VSS - 0.3 |
6.5 |
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pins (PE1, PE2) (2) |
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Input voltage on any other pin (2) |
VSS - 0.3 |
VDD + 0.3 |
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|VDDx - |
Variations between different power |
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50 |
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mV |
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Electrical characteristics |
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Symbol |
Ratings |
Min |
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Max |
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VDD| |
pins |
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|VSSx - |
Variations between all the different |
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50 |
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VSS| |
ground pins |
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VESD |
Electrostatic discharge voltage |
see Section 13.3.12.4: "Absolute maximum ratings |
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(electrical sensitivity)" |
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Notes:
(1)All power (VDD, VDDIO, VDDA) and ground (VSS, VSSIO, VSSA) pins must always be connected to the external power supply
(2)IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. For true open-drain pads, there is no positive injection
current, and the corresponding VIN maximum must always be respected
Table 17: Current characteristics
Symbol |
Ratings |
Max. |
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Unit |
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(1) |
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IVDD |
Total current into VDD power lines (source) (2) |
60 |
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mA |
IVSS |
Total current out of VSS ground lines (sink) (2) |
60 |
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IIO |
Output current sunk by any I/O and control pin |
20 |
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Output current source by any I/Os and control pin |
20 |
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ΣIIO |
Total output current sourced (sum of all I/O and control pins) for devices |
200 |
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with two VDDIO pins (3) |
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Total output current sourced (sum of all I/O and control pins) for devices |
100 |
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with one VDDIO pin (3) |
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Total output current sunk (sum of all I/O and control pins) for devices |
160 |
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with two VSSIO pins (3) |
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Total output current sunk (sum of all I/O and control pins) for devices |
80 |
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with one VSSIO pin (3) |
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IINJ(PIN)(4)(5) |
Injected current on NRST pin |
±4 |
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Injected current on OSCIN pin |
±4 |
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Injected current on any other pin (6) |
±4 |
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ΣIINJ(PIN)(4) |
Total injected current (sum of all I/O and control pins) (6) |
±20 |
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Notes:
(1)Data based on characterization results, not tested in production.
(2)All power (VDD, VDDIO, VDDA) and ground (VSS, VSSIO, VSSA) pins must always be connected to the external supply.
(3)I/O pins used simultaneously for high current source/sink must be uniformly spaced around the package between the VDDIO/VSSIO pins.
(4)IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. For true open-drain pads, there is no positive injection
current, and the corresponding VIN maximum must always be respected
(5)Negative injection disturbs the analog performance of the device. See note in Section 7.11: "TIM2, TIM3 - 16-bit general purpose timers".
(6)When several inputs are submitted to a current injection, the maximum ΣIINJ(PIN) is the absolute sum of the
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