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Using the Value Change Link (VCL)

Using the Value Change Link (VCL)

Example of many-to-one mapping between nets in description and simulated nets

w1

 

 

 

 

w2

w3

 

 

 

 

 

 

 

 

 

 

c1

c2

c3

d1

 

b1

a1

Through the use of acc_handle_simulated_net in the process of scanning cells, the application recognizes that nets w1 and w3 are in fact a single net for simulation purposes. The application will only monitor this single net once. The calltf routine code description in Figure 1-4 on page 16 shows how the toggle test application reduces the number of nets monitored during simulation using this method.

Organizing the Data Structure

The efficiency of your VCL application is affected by the organization of your data and how easily you can access that data within your application. When organizing the data in your VCL application, there are two areas to consider when thinking about efficiency:

Organizing so that application-specific manipulation of the data takes place efficiently

Organizing so that data can be manipulated efficiently in the consumer routine

To make it easier for you to manipulate data in the consumer routine, regardless of how you organize the data in your application, the VCL provides the user_data argument. The user_data argument is typically a pointer to a data structure that contains information about

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Using the Value Change Link (VCL)

the object. You pass the user_data information as an argument in the call to the VCL access routine acc_vcl_add. Since the user_data argument can be different for every object you monitor, you can use the argument to pass the storage location of the data associated with a monitored object back to your application whenever the value of that object changes.

In the toggle test application, the toggle information is stored in an array of structures where each element of the array contains information specific to one or more nets. The associated data structures are shown in the following figure. The location of a net in this array is based on a hashing operation performed on the net’s hierarchial name. This makes accessing the data for the purpose of generating reports efficient because the information can be reported in a number of different ways.

The net information data structures

/*** DEFINES ***/

 

 

 

 

 

 

 

 

 

 

 

 

#define TABLE_SIZE 3000

 

 

 

 

The size of the array of net

 

 

 

 

information structures

 

 

 

 

 

 

 

 

. . .

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

/*** STRUCTURES ***/

 

 

 

 

 

 

 

 

. . .

 

 

 

 

 

 

 

 

 

 

 

 

One of the net information

 

 

typedef struct t_tg_net

 

 

 

 

structures

 

 

 

 

 

 

 

 

 

{

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

int used;

 

 

 

 

 

 

 

 

handle net_handle;

 

 

 

 

 

 

 

 

char *full_name;

 

 

 

 

 

 

 

 

int one_to_zero;

 

 

 

 

 

 

 

 

int zero_to_one;

 

 

 

 

 

 

 

 

struct t_tg_name *ports;

 

 

 

 

 

 

 

 

struct t_tg_net *next;

 

 

 

 

 

 

 

 

} s_tg_net, *p_tg_net;

 

 

 

 

 

 

 

 

. . .

 

 

 

 

 

 

 

 

 

 

 

/*** GLOBAL VARIABLES ***/

 

 

 

 

 

 

 

 

. . .

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The array of simulated nets (hash

s_tg_net tg_nets[TABLE_SIZE];

 

 

 

 

 

table)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

For purposes of VCL efficiency, the application passes the address of the s_tg_net data structure associated with the given net whenever monitoring is initiated with acc_vcl_add. This is shown in Figure 1-4 on page 16 . Verilog-XL passes this address back as the

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Using the Value Change Link (VCL)

user_data information to the consumer routine when the net changes value. This passing back of the argument allows direct access to the net specific structure in the consumer routine.

Starting the Monitor

You need to decide what type of VCL data information your application needs. The VCL allows you to monitor either logic value or logic value and strength information. To choose one of these options, you need to include a predefined constant as the last argument in the call to the acc_vcl_add access routine. There are two predefined constants:

vcl_verilog_logic—monitor logic value information

vcl_verilog_strength—monitor logic value and strength information

For the needs of the toggle test application, the application monitors only logic value information. As shown in Figure 1-4 on page 16 , the access routine acc_vcl_add uses the vcl_verilog_logic flag for selecting this type of data.

If your application calls acc_vcl_add with the same arguments more than once, Verilog-XL calls the consumer routine only once when the object changes value.

Processing the VCL Data

In your application, there are two ways you can process VCL information, asynchronously and synchronously. This section shows you how you can process value change information in either way.

Asynchronous Processing

Asynchronous processing processes the value change information whenever a monitored object changes value.

When a monitored object changes value, Verilog-XL passes a pointer to a value change record to the consumer routine. The value change record is the t_vc_record data structure that you need to process the value changes. The contents of this structure allow you to efficiently process the value change information within your consumer routine without having to inquire for additional data. The value change record contains the following information:

A flag indicating the type of change that took place

The time the change took place

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Using the Value Change Link (VCL)

The new value information

The user_data information, which you can use to access further information to process the value change

The following figure shows the t_vc_record data structure and the information it stores.

Figure 1-5 The t_vc_record C-language structure

/*** DEFINES ***/

The size of the array of net

#define TABLE_SIZE 3000 information structures

. . .

/*** STRUCTURES ***/

. . .

One of the net information typedef struct t_tg_net structures

{

int used;

handle net_handle; char *full_name; int one_to_zero; int zero_to_one;

struct t_tg_name *ports; struct t_tg_net *next;

} s_tg_net, *p_tg_net;

. . .

/*** GLOBAL VARIABLES ***/

. . .

 

 

 

 

 

s_tg_net tg_nets[TABLE_SIZE];

 

 

The array of simulated nets

 

 

(hash table)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The vc_reason flag tells you the following:

What type of change took place

How to access the value change data

Typically, a consumer routine uses a multi-way conditional switch statement to evaluate vc_reason and perform the appropriate action, depending upon the change.

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Using the Value Change Link (VCL)

The consumer routine in the toggle test application only monitors logic value change information. The consumer routine from the toggle test application is shown in Figure 1-6 on page 23 .

Figure 1-6 Toggle test consumer routine

/* tg_process_toggle()

*

*This is the VCL consumer routine for the toggle

*applications.It is called whenever one of the monitored

*nets changes value.This routine stores the value

*change in the buffer and calls the buffer

*processing routine if the buffer is full.

*

*/ tg_process_toggle(change_data) p_vc_record change_data;

{

/* store pointer to net structure and value in buffer */ tg_buffer[tg_curr_buff_ele].net =

(p_tg_net) change_data->user_data; tg_buffer[tg_curr_buff_ele].value =

change_data->out_value.logic_value;

/* update current buffer element - if buffer is full, call * routine to process buffer */

tg_curr_buff_ele++;

if (tg_curr_buff_ele == BUFFER_SIZE) tg_process_buffer();

}

Data Buffering

When writing a VCL application, it is important that you carefully consider how you want the consumer routine to process the data. Some applications need the consumer routine to process the information as soon as the value change is reported, while for other applications it does not matter whether the consumer routine processes the information right away or not. If the consumer routine does not need to process the information right away, you may be able to make your application more efficient by placing the data into a memory buffer and processing the data when the buffer is full.

Data buffering allows simulation to take place more efficiently by isolating access to data structures Verilog-XL is not using for simulation. This can limit the amount of memory swapping that results each time the application accesses these data structures.

The toggle test application uses the buffering strategy to increase efficiency. Figure 1-7 on page 24 shows the toggle test application buffer data structures. The code description in Figure 1-6 on page 23 shows the consumer routine storing the user_data information in the buffer when a change occurs.

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Using the Value Change Link (VCL)

Figure 1-7 Toggle test buffer data structure

//* toggle.h

.

.

/*** DEFINES ***/

.

. The size of the buffer

#define BUFFER_SIZE 100

/*** STRUCTURES ***/

One element in the buffer

typedef struct t_tg_buff_ele

{

struct t_tg_net *net; unsigned char value;

} s_tg_buff_ele, *p_tg_buff_ele;

/*** GLOBAL VARIABLES ***/

The buffer

s_tg_buff_ele tg_buffer[BUFFER_SIZE]; /* toggle data buffer */ int tg_curr_buff_ele; /* current buffer element

*/

Where the consumer routine places the next piece of data in the buffer

When the buffer is full, the application calls the tg_process_buffer routine to process the data stored in the buffer (see Figure 1-8 on page 25 ). The tg_process_buffer routine records the toggle information in the net data structure accessed with the user_data information and stops monitoring the net once the net meets the toggle criteria.

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Using the Value Change Link (VCL)

Figure 1-8 The buffer processing routine

 

 

 

 

tg_process_buffer()

 

 

 

 

{

 

 

 

 

 

int i;

 

 

 

 

p_tg_net net;

 

 

 

 

acc_initialize();

 

 

 

 

 

 

 

 

acc_configure(accDevelopmentVersion,"1.5c");

 

 

 

 

Step through all data

 

 

 

 

in the buffer.

 

i = 0;

 

 

 

 

 

 

 

 

 

 

 

 

while (i < tg_curr_buff_ele)

 

 

 

 

Get a pointer to the

s_tg_net data

{

 

 

structure; Verilog-XL passes this pointer to

net = tg_buffer[i].net;

 

 

the consumer routine as the user_data

 

 

 

information.

 

 

 

 

 

 

 

 

if ((!net->one_to_zero) || (!net->zero_to_one))

{

switch(tg_buffer[i].value)

{

case vcl0: net->one_to_zero = TRUE; break;

case vcl1: net->zero_to_one = TRUE break;

}

Process the data if the net has not toggled.

continued . . .

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Using the Value Change Link (VCL)

Figure 1-8 The buffer processing routine, continued

Stop monitoring the net if the net toggles.

if (net->zero_to_one && net->one_to_zero)

{

acc_vcl_delete(net->net_handle,tg_process_toggle, (char *) net,vcl_verilog_logic);

tg_toggled_nets++;

tg_toggled_port_bits = tg_toggled_port_bits + net->num_ports;

}

}

i++;

}

/* reset current buffer element */

 

 

 

tg_curr_buff_ele = 0;

 

 

Reset current buffer

 

 

 

element index.

 

/* close access routines */

 

 

 

 

 

 

 

 

 

 

 

acc_close();

 

 

 

}

Multiple Changes on a Single Object in One Time Step

If multiple changes for a monitored object occur within a single time step, the VCL reports every change with a separate call to the consumer routine. If your application does not need to process multiple changes within a single time step, you must identify and process the meaningful changes in your consumer routine. You can accomplish this, for example, by storing the value in the consumer routine and using the misctf user-defined routine to delay the data processing to the end of a given time step. See “Synchronous and Strobe-Based Processing” on page 27 for more information.

In the toggle test example, no special consideration is given to multiple changes on a single object in one time step, so multiple changes are counted as separate transitions.

Deleting Signals

If while processing the data you decide not to monitor an object any more, you can turn off the monitor by using the acc_vcl_delete access routine. This routine discontinues data

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Using the Value Change Link (VCL)

monitoring only for the consumer routine/user_data combination you pass to the acc_vcl_delete access routine. Other applications that are monitoring the object are not affected.

In the toggle test application, the tg_process_buffer routine discontinues monitoring whenever a change in a net results in that net meeting the toggle criteria (see Figure 1-8 on page 25 ).

Synchronous and Strobe-Based Processing

Synchronous processing processes the value change information at the end of a time step in which a monitored object changes value. Strobe-based processing processes the value change information at regular intervals.

The misctf Routine

Applications often require one of the following two forms of data processing:

Data processing synchronized at the end of a time step in which a specific object changes value

Data processing at regular intervals in a strobe-based manner

Synchronous processing can be accomplished by scheduling a callback to your misctf routine within your consumer routine when an object changes value.

Strobe-based processing can be accomplished in two ways, both of which make use of the available callback capability that allows you to schedule Verilog-XL to call your misctf routine back at regular intervals. The two ways you can process data in a strobe-based manner are as follows:

A non-VCL approach

A VCL approach

The non-VCL approach requires that you retrieve the current logic or strength object values using the acc_fetch_value access routine every time Verilog-XL calls your misctf routine to process the data. This method can be rather inefficient, especially when the set of objects you are monitoring is large and the level of activity on those objects is low. In these cases, it may be more efficient to use the second approach. Use VCL to monitor and store value changes in your application data structure and access this data structure for the latest values every time Verilog-XL calls your misctf routine to process the values.

The toggle test application does not use either synchronous or strobe-based processing.

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