- •Contents
- •Using the Value Change Link (VCL)
- •Overview
- •Purpose
- •Audience
- •Using VCL to Monitor Value Changes
- •Designing a VCL Application
- •The PLI Interface
- •The VCL Interface
- •The VCL Components
- •The Toggle Test Application
- •What Is a Toggle Test?
- •The System Task Syntax
- •The General Structure of the Application
- •VCL Operations
- •Selecting Signals
- •Organizing the Data Structure
- •Starting the Monitor
- •Processing the VCL Data
- •Miscellaneous VCL Tasks
Using the Value Change Link (VCL)
Using the Value Change Link (VCL)
VCL Operations
This section describes operations you need to perform in a typical VCL application. These operations fall into the following categories:
■Selecting signals
■Organizing the date structure
■Starting the monitor
■Processing VCL data
■Miscellaneous VCL tasks
The section for each category describes the operations you need to perform and how to perform them, and contain code examples from the toggle test application.
Selecting Signals
The first thing you need to do in a VCL application is figure out which signals you want to monitor and start the monitoring process.
Use the standard PLI access routines to get handles to the objects you want to monitor. The standard PLI access routines can serve as a flexible signal selection mechanism.
You can use the PLI access routines in many ways. For example, you can use the PLI access routines to perform the following operations:
■Read names of objects out of a file and retrieve handles to those objects using acc_handle_object
■Pass the name of a module instance as an argument to a system task call and use access routine acc_next_net to retrieve handles to all of the nets inside of that module instance
The following figure shows a section of code that performs the task of signal selection for the toggle test application.
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Using the Value Change Link (VCL)
Using the Value Change Link (VCL)
Figure 1-4 Signal selection in the toggle test application
for (i = 1; 1 <= num_params; i++)
{
/* get handle to the module */ module = acc_handle_tfarg(i);
Retrieves a handle to the module instance; pass this module instance name as an argument to the system task
/* scan cells under this module */ curr_cell = null;
Steps through the cell instances within the hierarchy identified by variable module; the cell instance is identified by the handle in variable curr_cell
while ((curr_cell = acc_next_cell(module,curr_cell)) != null)
{
* scan cell ports |
*/ |
Steps through the ports of each cell instance; |
curr_port = null; |
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the ports are identified by the handle in variable |
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curr_port |
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while((curr_port = acc_next_port(curr_cell,curr_port)) != null)
{
/* scan the higher-level nets connected to this port */ curr_net = null; Steps through the hierarchically higher connected nets
of each port; the hierarchically higher connected nets are identified by the handle in variable curr_net
while ((curr_net = acc_next_hiconn(curr_port,curr_net)) != null)
{
sim_net = acc_handle_simulated_net(curr_net);
Returns a handle to the simulated net that is associated with the net identified by the handle in the variable curr_net
continued . . .
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Using the Value Change Link (VCL)
Using the Value Change Link (VCL)
Figure 1-4 Signal selection in the toggle test application , continued
/* Make an entry for this net in the hash table if one
does not already exist. Start monitoring if this is a new net*/ if (tg_hash_enter(sim_net,curr_port,&net_node))
{
acc_vcl_add(sim_net,tg_process_toggle, |
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(char *) net_node,vcl_verilog_logic); |
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tg_num_mon_nets++; |
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} |
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Starts monitoring value change information |
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tg_num_mon_nets++; |
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for the net identified by the handle in the |
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} |
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variable sim_net |
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} |
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Updates the count of monitored port bits |
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Hierarchical Scanning
A common method of finding the nets you want to monitor is called hierarchical scanning. Hierarchical scanning is a method of scanning that involves all objects in a certain class below a given module instance. Hierarchical scanning allows you to write an application where you can pass a module instance name to a system task. The application determines all of the objects to be monitored based on this module instance name.
The VCL access routines do not support hierarchical scanning and monitoring directly. However, you can use recursive programming techniques to scan the hierarchy and obtain handles to the signals that you want to monitor. Depending upon what type of descriptions you use with your application, you can make use of certain built-in PLI access routines to help you implement this functionality.
The toggle test application, where the modules of interest are defined as cells, uses acc_next_cell to automatically scan all the cell instances below a given module instance in the hierarchy.
As shown in Figure 1-4 on page 16 , the toggle test application uses the module instance names passed to the system task as a starting point for each hierarchical scan.
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Using the Value Change Link (VCL)
Using the Value Change Link (VCL)
Monitoring Only Required Nets
When you create a VCL application, one important efficiency consideration involves making sure you monitor only the nets that are required by your application. This is especially important in light of certain operations that Verilog-XL performs when it compiles a design.
When Verilog-XL compiles your design, it reduces the number of nets used during simulation through a process known as port collapsing. Port collapsing takes nets connected across ports and collapses them onto a single simulated net. This results in a many-to-one mapping of nets in your description to nets that have the same values during simulation. You can make your application more efficient by recognizing the situation where multiple nets you are monitoring are represented by a single net during simulation. You can recognize this situation through the use of the acc_handle_simulated_net access routine.
The acc_handle_simulated_net access routine takes a net handle as an argument and returns a handle to the associated simulated net.
By using the acc_handle_simulated_net access routine, you can guarantee that your application monitors the minimum number of nets necessary in a design. You can then make arrangements in your data structure so that simulated nets reference all of the nets that they represent in a description.
The toggle test application uses the acc_handle_simulated_net access routine approach to monitor the minimum number of necessary nets. The type of situation where this process reduces the number of nets monitored is shown in the following figure.
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