Virtuoso Schematic Composer User Guide

Preface

The Virtuoso® Schematic Composer is a design entry tool that supports the work of logic and circuit design engineers, including drafters. Physical layout designers and printed circuit board designers can use the information as background material to support their work.

The preface discusses the following topics:

■Related Documents on page 32

■Typographic and Syntax Conventions on page 32

Virtuoso Schematic Composer User Guide

Preface

Related Documents

You can use the schematic composer with other Cadence® products. It requires knowledge of special languages such as the Cadence SKILL language. The following documents give you more information about these tools and languages.

■The Design Framework II User Guide provides information if you are not familiar with

Cadence terms and starting your system.

■The Cadence Application Infrastructure User Guide provides additional information about the architecture.

■The Virtuoso Schematic Composer Tutorial assumes that you know how to design schematics but are new to the schematic composer software.

■The Inherited Connections Flow Guide describes how to use inherited connections and net expressions with various Cadence tools in the design flow.

■The Virtuoso Schematic Composer SKILL Functions Reference Manual is for users who customize the standard product.

■The Library Manager User Guide explains how to open or create cellviews from the library manager.

■The Verilog-XL Integration Reference Manual describes how to use design entry with Verilog® HDL. Integrated circuit designers who use the Verilog-XL simulator to verify the logic of their designs can benefit from this manual.

■The Virtuoso Schematic Composer VHDL Interface User Guide describes how to use design entry with VHDL.

■The Text-to-Symbol Generator (TSG) is a Cadence application program that automatically generates circuit symbols for the schematic composer and subsequent simulation processes. TSG provides a quick way to generate a symbol from a list of pins.

You also use TSG when you use the Create – Cellview commands when the destination is a symbol cellview.

■The Symbol and Simulation Library Generator (S/SLG) is a Cadence SKILL language-based library management program that generates symbol and simulation views.

Typographic and Syntax Conventions

This section describes typographic and syntax conventions used in this manual.

Important

The language requires many characters not included in the preceding list. You must type these characters exactly as they are shown in the syntax.

Virtuoso Schematic Composer User Guide

Preface