Furber S.ARM system-on-chip architecture.2000

Edge-triggered latches

Registers

In principle it should be possible to build any sequential circuit using a D-type latch provided the combinatorial logic between stages is slow enough. Applying a very short positive pulse to En will let the next state data through the latch and then hold it before the combinatorial logic has time to respond to the new values. However, in practice this turns out to be a very hard way to build a reliable circuit.

There are various ways to build more reliable latching circuits, most of which require each signal to pass through two transparent latches per clock cycle. In the simplest of these, the second latch is placed in series with the first and operates with the inverse enable function. At all times, one latch or the other is holding and the other is transparent. On one clock edge, where the first latch goes opaque and the second goes transparent, the input data value propagates through to the output. It is then held through the full cycle until the same" edge in the following cycle. This is therefore an edge-triggered latch; its logic symbol, circuit and sequence table are shown in Figure A.6 on page 404. (In the table an 'x' in an input column indicates that the input has no effect on the output.)

Edge-triggered latches require very careful design, since they are not simply combinatorial logic circuits and their function depends critically on the dynamic properties of the circuit elements. If constructed, as suggested above, from two transparent latches in series, there are various race conditions which must be avoided. But, with good tools, reliable latches can be designed, and once a reliable latch is available, sequential circuits of arbitrary complexity can be constructed.

A set of edge-triggered (or equivalent) latches which jointly store the state of a binary value through a clock cycle is termed a register. A flexible form of register is connected to a free-running clock and has a 'clock enable' control input so that control logic can decide on a cycle-by-cycle basis whether or not to update the register's contents. A simple way to build such a register is to add a gate on the common clock

ACM Association for Computing Machinery; the American association for computing professionals.

Acorn Computers Limited The UK company where the ARM processor was developed between 1983 and 1985. Acorn also developed the BBC microcomputer, which established the wide spread educational use of computers in the UK, and the Archimedes range of ARM-based computers which followed the BBC micro into the schools market.

ADC Analogue to Digital Converter, an electronic circuit that takes an input which may vary continuously within a specified range and converts it into an /z-bit binary number that approximates the input to one of 2" discrete values within that range.

ALL) Arithmetic-Logic Unit; the component in a processor that performs the arithmetic (addition, subtraction, and sometimes including multiplication and division) and logic (shift, bit-wise AND, and so on) operations.

AMBA Advanced Microcontroller Bus Architecture; an open standard for an on-chip bus which connects the various modules used to build a complex embedded system chip.

AMULET Asynchronous Microprocessor Using Low-Energy Technology; this term is used to describe the prototype asynchronous implementations of the ARM architecture developed at the University of Manchester.

ANSI American National Standards Institute; the American standards body that has defined many useful conventions which are widely used in computing, for example ASCII and ANSI standard C.

APCS ARM Procedure Call Standard; a calling convention defined by ARM Limited to allow procedures generated by different compilers (or written in assembly language) to call each other.

ARM Formerly Advanced RISC Machine (and before that Acorn RISC Machine), but the acronym expansion has now been formally abandoned; a 32-bit microprocessor based on RISC design principles.

ARM Limited The company spun out from Acorn in 1990 to develop the ARM technology. Based in Cambridge, England, but with design and sales activities in several world regions.

ASCII American Standard for Computer Information Interchange; a standard way to represent printable and print control characters in 7-bit binary numbers (often extended to 8-bit fields in today's computers).

ASIC Application-Specific Integrated Circuit; a VLSI device designed for a particular application, usually for a particular customer.

ASSP Application-Specific Standard Pan; a VLSI device designed for a particular application that is sold as a standard component by the semiconductor manufacturer. Often the chip will have been developed as an ASIC, but then in response to market demand the manufacturer will have come to an agreement with the original customer to make the chip available to other customers.

BBC The British Broadcasting Corporation; the UK public service radio and television broadcasting company. The BBC is funded mainly through licence fees which are a compulsory feature of television ownership in the UK. Their charter includes a duty to educate the public, and in 1982 they produced a popular series called 'The Computer Programme' based around the BBC micro which was commissioned for the series.

BCD Binary Coded Decimal; a way to represent a number by encoding each decimal digit as its binary equivalent.

BCS The British Computer Society; the UK association for computing professionals.

C The C programming language, widely used for general-purpose and embedded system development.

CAM Content Addressable Memory; this is memory which contains a number of different data items and is accessed by presenting a data value which is compared with all the stored items to see if there is a match. If there is a match, the address of the matched location is output;

otherwise the CAM signals a 'miss'. It is also described as associative memory, and is an important component of an associative cache or TLB.

CISC Complex Instruction Set Computer, a term created at the same time as RISC to describe earlier architectures that do not have the characteristics of RISCs. Typically a CISC has a variable instruction length minicomputer style instruction set with many addressing modes, memory-to-memory operations and support for many data types.

CMOS Complementary Metal Oxide Semiconductor, the predominant technology used for modern integrated circuits, CMOS combines NMOS and PMOS field-effect transistors on the same chip. This gives the technology active signal drive in both directions, hence fast switching, and near zero power dissipation when it is not switching.

Codec Coder-decoder; an electronic system that converts an input (for example an analogue speech signal) into a digitally encoded form and can also reverse this conversion. The same term can also be used for a compressor-decompressor.

CPI Cycles Per Instruction; a measure of processor efficiency based on the number of clock cycles divided by the number of instructions in a typical code sequence.

CPSR Current Program Status Register; an ARM register which contains the condition code bits, interrupt disable flags and processor operating mode bits.

CPU The Central Processing Unit; a term used somewhat imprecisely to refer to the processor in a computer. It might be just the integer core, or it might include the on-chip MMU and cache, and possibly the main memory as well. In this book its use is restricted to those processor cores that include cache memory, and it is used to describe the system comprising the processor, cache and MMU (if present).

DAC Digital-to-Analogue Converter; an electronic circuit that converts a digital signal, usually presented in binary form on n wires, into an analogue signal presented as one of 2" values on a single wire.

DECT Digital European Cordless Telephone; a European standard for cordless telephones where speech is transferred in digital form between the handset and a local base-station through a radio link.

DRAM Dynamic Random Access Memory; the lowest price per bit form of RAM, used as the main memory in most computer systems. The data is stored as charge on a

capacitor and leaks away in a few milliseconds (hence dynamic); to store for longer periods the DRAM must be refreshed periodically, which means it must be read while it is still valid and then rewritten to restore the full charge.

DSP Digital Signal Processor; a programmable processor whose organization is optimized towards processing continuous streams of digital data. This should be contrasted with a general-purpose processor such as the ARM that is optimized for control (decision making) operations.

EDO Extended Data Out; a particular interface standard for DRAM memory that allows high-performance memory systems to be built.

EEPROM (also E2PROM.) Electrically Erasable and Programmable Read Only Memory; a ROM that can be programmed and erased by applying suitable electrical signals. Similar to flash memory, but uses a different technology and is generally less flexible than flash.

EPLD Electrically-Programmable Logic Device; a general-purpose logic chip which has a large number of gates whose connectivity is defined by the state of on-chip memory cells. These cells may be reprogrammed to change the logic function of the device. (See also FPGA, which is a one-time configurable device.)

EPROM Electrically-Programmable Read Only Memory; a ROM which can be programmed by applying suitable electrical signals. Usually it can be erased using an ultra-violet light source and reprogrammed many times.

Flash A form of electrically programmable read only memory that can be erased and reprogrammed electronically. It is widely used to store infrequently changing programs and data in portable systems, and increasingly used as a form of non-volatile file store.

FPA Floating-Point Accelerator; additional hardware to speed up floating-point operations, for example, the ARM FPA10.

FPASC Floating-Point Accelerator Support Code; the software that is run in an ARM system which includes an FPA 10 floating-point accelerator. The FPA 10 implements a subset of the ARM floating-point instruction set in hardware, and requires the FPASC to handle the remaining instructions.

FPE Floating-Point Emulator; the software which is run in an ARM system which does not include an FPA 10 float- ing-point accelerator to support the ARM floating-point instruction set.

FPGA Field-Programmable Gate Array; a general-purpose logic chip which has a large number of gates whose connectivity is defined by the state of one-time programmable on-chip components such as anti-fuses. (See also EPLD, which is a reprogrammable device.)

FPSR Floating-Point Status Register, a user-visible register in the ARM floating-point architecture which controls various options and indicates error conditions.

FPU Floating-Point Unit; the component in a processor that carries out the floating-point operations.

FSM Finite State Machine; a sequential digital circuit that has an internal state and whose outputs and next state are combinatorial logic functions of its inputs and current state.

GSM Global System for Mobile communications; a digital standard for mobile telephony used throughout Europe and Asia and in other world regions.

1C Integrated Circuit; a semiconductor device where several (up to several million) transistors have been printed during the same manufacturing process. An 1C is sometimes referred to as a 'chip'.

IDE Integrated Drive Electronics; an interface for a hard disk drive where all the intelligence is in the drive electronics and the host computer interface comprises a data bus and a few address lines.

IEE The Institution of Electrical Engineers; the UK professional association for electronics (and electrical) engineers. The IEE sponsors colloquia and publishes journals in the computing area.

IEEE The Institute of Electrical and Electronics Engineers, Inc.; the American professional association for electronics and electrical engineers. Membership is not restricted to US nationals, and the IEEE is very active in sponsoring international conferences and publishing journals in the computing area, often in collaboration with the/4CM.

I2C Inter-IC; a serial bus standard used to connect /Cs together on a printed circuit board. It is particularly useful for connecting small CMOS RAMs and RTC chips that are powered up even when the rest of the system is switched off.

I/O Input/Output; the activity of transferring data between the computer and its environment through a peripheral device.

IrDA Infra-red Data Association; an organization established to standardize infra-red communication protocols across the industry, the acronym is frequently applied to a system interface that complies with the resulting standards.

ISDN Integrated Services Digital Network; an international standard for digital telephony where speech is sent as a 64 Kbit/s data stream. The standard also defines control protocols.

JTAG Joint Test Action Group; the committee which defined the test standard based on a serial interface which is used on many ARM chips.

LCD. Liquid Crystal Display; the display technology favoured for most portable applications such as lap-top computers and PDAs due to its low weight and power consumption.

LRU Least-Recently Used; this term describes an algorithm for choosing which value in an associative cache or TLB to evict in order to make room for a new value.

MFLOPS Millions of Floating-Point Operations Per Second; a measure of the performance of a computer when executing floating-point operations.

MIPS Millions of Instructions Per Second; a measure of the rate at which a processor can execute its own instructions. Since different instruction sets have different semantic content per instruction, comparing two processors on the basis of their native MIPS rating is meaningless. Benchmark programs attempt to provide a basis for valid comparison, and 'Dhrystone MIPS' is a normalized rating that is (arguably) more valid.

MMU Memory Management Unit; the part of the processor that translates the virtual address into the physical address, using page tables in memory. It includes the table-walking hardware and the TLB.

Modem Modulator-demodulator; an electronic system or subsystem that converts digital data into a form that can be sent (for example) over a conventional voice telephone connection, and can recover digital data from a similar received audio signal. Simple modems use one audio frequency for a 0 and a different frequency for a 1, but today's high-speed modems use much more sophisticated modulation techniques.

NMOS N-type Metal Oxide Semiconductor; a semiconductor technology that pre-dates CMOS that was used to build some 8- and 16-bit microprocessors. It supports a logic family with active pull-down and passive pull-up outputs, and gates with a low output draw current even when not switching. NMOS transistors are used, with PMOS transistors, to form CMOS. NMOS transistors are more effective than PMOS transistors, which is why NMOS superseded PMOS as the technology of choice for microprocessors, but the combination of the two in CMOS, though more complex to manufacture, is greatly superior to either in both speed and power-efficiency.

OS Operating System; the central code in a system that manages the application code, handling scheduling, resource allocation, protection, and so on.

PC Program Counter; the register in a processor that holds the address of the next instruction to be fetched. Usually the context should differentiate this use from the next.

PC Personal Computer; although apparently generic, this term is now used to refer to desktop computers which are compatible with the IBM PC, which means, inter alia, that they use a processor with the Intel x86 instruction set architecture.

PCMCIA Personal Computer Memory Card International Association; the organization responsible for a physical form and interface standard for cards which plug into PCs (and other portable equipment). Despite the name, the standard is not limited to memory cards; various peripheral interface cards are also conformant. PCMCIA cards are often referred to simply as 'PC-cards'.

PDA Personal Digital Assistant; a term first coined to describe the Apple Newton, but now applied to any palmtop computer.

PLA Programmable Logic Array; a pseudo-regular structure on an integrated circuit that implements a complex multi-output combinatorial logic function.

PLL Phase-Locked Loop; a circuit used to generate a clock signal using another clock signal as a reference.

PMOS P-type Metal Oxide Semiconductor, a semiconductor technology that pre-dates CMOS and NMOS that was used to build early 4-bit microprocessors. It supports a logic family with active pull-up and passive pull-down outputs, and gates with a high output draw current even when not switching. PMOS transistors are used, with NMOS transistors, to form CMOS.

PSR Program Status Register, the register in a processor that holds various bits of information such as the condition codes, the interrupt disable bits and the operating mode bits. The ARM has a CPSR (Current Program Status Register), and an SPSR (Saved Program Status Register) for each non-user mode.

PSU Power Supply Unit; the electronics that provides the regulated supply voltage(s) required by the system, usually using a mains electricity or battery power source.

RAM Random Access Memory; a misnomer, since ROM is also random access, RAM is used to refer to the read-

write memory used to store programs and data in a computer; the term is also used to describe the semiconductor components used to build this memory and also used in structures such as caches and TLBs.

RISC Reduced Instruction Set Computer; a processor with an architecture with certain characteristics based on ideas expounded around 1980 by Patterson (U.C. Berkeley), Ditzel (Bell Laboratories) and Hennessy (Stanford University).

ROM Read Only Memory; the fixed program store in a computer, also used to describe the semiconductor devices which may be used in this role. Contrast with RAM.

RS232 A particular standard for asynchronous serial communications, enabling the connection of modems, printers, and communication with other machines.

RTC Real-Time Clock; a clock source which allows a computer to work out the time of day, date, and so on. Normally this is a small battery-backed system with a low frequency crystal oscillator which runs all the time, even when the computer itself is turned off.

RTL Register Transfer Level; an abstract view of a hardware system such as a processor where multi-bit values are viewed as flowing between registers along buses.

RTOS Real-Time Operating System; an operating system that supports programs that must satisfy external timing constraints. These are often small (a few kilobytes) and well suited to use in embedded systems.

SDLC Synchronous Data Link Controller; a peripheral that connects a computer to a clocked serial interface and supports one or more standard protocols.

SoC System-on-Chip; a single integrated circuit that incorporates all of the functionality of an electronic system, including the processor, memory and peripherals. At the time of writing most SoCs still require off-chip memory resources in addition to their on-chip memory, but all other system components are on chip.

SPSR Saved Program Status Register, an ARM register used to save the values of the CPSR when an exception occurs.

SRAM Static Random Access Memory; more expensive than DRAM, this form of RAM holds its data in flip-flops which do not require refreshing. SRAM has a lower access time than DRAM and can retain its contents indefinitely with almost no power dissipation. It is used for most RAM functions on processor chips, such as cache and TLB