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Файл:(ARM).Reference peripherals specification.pdf
Remap and Pause
6.6Remap and Pause Memory Map
The base address of the Remap and Pause controller memory is not fixed and may be different for any particular system implementation. However, the offset of any particular register from the base address is fixed.
Address |
Read Location |
Write Location |
|
|
|
RemapBase |
Reserved |
Pause |
|
|
|
RemapBase + 0x10 |
Identification |
Reserved |
|
|
|
RemapBase + 0x20 |
Reserved |
ClearResetMap |
|
|
|
RemapBase + 0x30 |
ResetStatus |
ResetStatusSet |
|
|
|
RemapBase + 0x34 |
Reserved |
ResetStatusClear |
|
|
|
Table 6-1: Remap and Pause Memory Map
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|
Reference Peripherals Specification |
6-7 |
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|
ARM DDI 0062D |
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|
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Open Access
Remap and Pause
6-8 |
Reference Peripherals Specification |
|
|
|
ARM DDI 0062D |
|
|
|
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|
Open Access