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Fowler-Nordheim tunneling where the insulator is thinned. In an interesting application of quantum physics, the electrons “tunnel” through the insulator. The operation is similar to an EPROM except that most types can be erased and programmed in circuit, using 5 volt power supplies and a standard micro­ processor bus interface. For many of the devices, each byte must be erased by writing ones to a location before it can be programmed. While these devices would seem to be nearly ideal as non-volatile read/write memories, they do have a couple of drawbacks. EEPROM bits have a limited number of write cycles before they get “stuck” in the programmed state. They are typically guaranteed for 10,000 to 100,000 write cycles, which would take only a few seconds if a program gets stuck in a tight loop writing to the EEPROM. This problem is due to the fact that charge can be trapped in defects in the insulator in the gate region resulting in some bits getting “stuck” in the programmed state. The other problem is that they are slow to write, typically taking many microseconds or even milliseconds to erase and write, compared to 100 nano­ seconds typical of SRAM.

Small EEPROMs are available with a serial interface so that they will fit into small (8-pin), low cost packages. They are particularly useful in embedded systems for storing configuration data to replace switches and jumpers. They are significantly slower than standard memories due to the serial interface, and are usually accessed using software to manipulate the serial lines directly.

Other Memory Types

Battery-backed CMOS SRAM or NVRAM (non-volatile RAM), is a device consisting of a low power CMOS SRAM, a battery, and control circuitry to maintain the data in the RAM using the battery when the external power is off. These devices come in two forms: an oversize IC socket containing the battery and control circuit into which a CMOS RAM is inserted, and a single package containing all three components with the RAM permanently installed. The advantages of these devices are that they have the same ease of read and write as a standard RAM, unlimited read/write cycles, and non-volatility. Disadvantages include the environmental and storage life limitations imposed by the battery, and delayed access to the data during power application. Write cycle access is disabled for a fixed period of time after the power supply reaches a predetermined voltage to prevent spurious write signals from corrupting the data while the processor is in the process of initializing itself. As a result of

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this initial period when the memory is “write-protected,” the processor cannot store data such as subroutine and interrupt return addresses on the stack. This can result in unpredictable operation unless the software has been designed to allow for the necessary delay after power up to guarantee that the memory will accept a write cycle.

Ferro-electric RAMis a semiconductor memory with a combination of fast access, unlimited write cycles, and non-volatility. This is a relatively new and unproven type of device that stores information using a material that can change its properties and be sensed electrically, but retains its data like magnetic storage when power is removed. The cost of these devices is high relative to the other types, however, limiting its potential applications.

The proliferation of memory technologies is due to the compromises in current memory devices. The ideal memory would be low cost, high density, random access, fast access time, read/write, and non-volatile, with unlimited read/write cycles. Each of the memory devices discussed is optimized to incorporate several of these ideal characteristics at the expense of the others. Because of these com­ promises the designer most often uses multiple types of devices to meet conflicting memory requirements. Probably the most common solution for embedded processors is the use of EPROM to store programs and constant data, and SRAM to store read/write data such as variables and stacks. EEPROMs are becoming more popular in embedded designs because they allow storage of information that is infrequently updated such as calibration and configuration information.

JEDEC Memory Pin-Outs

RAM, ROM, EPROM, and EEPROM pin-outs have been standardized to make it easier to design a microcomputer memory interface. The JEDEC (Joint Electronic Device Engineering Committee) standard defines the pin-out of the devices so that various types of memories can be installed at the same site in a circuit board with a few jumpers. This standard encompasses 24-, 28-, and 32-pin DIP devices, as well as equivalent surface mount packages. As a result, the data lines, and many of the address and control lines, are unchanged for a wide range of device sizes and memory types.

Figure 4-9 shows the pin assignments for a 32 kilobyte EPROM in a 28-pin DIP package and a 128 kilobyte static RAM in a 32-pin DIP package. Note

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the commonality of the two assignments. Both types of devices can be accom­ modated in the same pattern on a circuit board by connecting the common pins directly to the appropriate signals, and by providing movable jumpers or programmable logic to allow use of either type of memory. This particular pin-out pattern, or “footprint,” is standardized by JEDEC and is referred to as the JEDEC 28or 32-pin memory footprint.

SRAM Pin Connections

Device Programmers

A special device is required in order to program most types of PROMs because of their signal timing and voltage requirements. The PROM programmer or PROM burner programs a device with the data pattern from a master PROM,

a serial port, or a disk file. “PROM burner or blower” is a term that originated when programming fuse-link PROMs required that the fuse be burned or blown to program each bit in the memory. Device programmers come in two forms: a desktop instrument with serial I/O ports and disk drive for data input, or a PC compatible plug-in card. The desktop units are more versatile, but the

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plug-in cards are much less expensive. The most flexible units in both catego­ ries have a programmable power source and sense circuit on each device pin, and the least expensive are those that program only one type of device. Some programmers are also capable of programming PLDs (programmable logic devices) in addition to standard PROMs.

The procedure for programming an EPROM that has been used before is typically:

1)Remove the label covering the quartz window on the EPROM.

2)Place the EPROM in a UV EPROM eraser for 20 minutes to erase existing data.

3)Turn on the EPROM programmer.

4)Select the type of device to be programmed.

5)Load the data pattern into the programmer from a computer using a serial port.

6)Put the EPROM into the appropriate socket in the programmer.

7)Start the programmer, and wait anywhere from few seconds to twenty minutes.

8)The programmer indicates that the EPROM is properly programmed.

9)Remove the EPROM and cover the window with an identifying label.

10)Install the EPROM in the circuit board where it will operate.

Procedures for each programmer vary in detail, but the overall process re­ mains the same. The photo below shows what one type of programmer looks like. A zero insertion force (ZIF) integrated circuit socket is used to make it easy to insert and remove the device and to prevent damage to the pins on the device. Programmable devices in surface mount packages will also require the use of a special adapter. Programmers for memory and programmable logic devices are available at prices ranging from hundreds to thousands of dollars.

Memory Organization Considerations

A generic memory device is organized as a number (N) of locations multi­ plied by megabits per location. Here are two examples:

•“128K x 8” SRAM representing a chip with 128,000 locations of eight bits each = 128 kilobytes of storage capacity.