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CodeVisionAVR

5.10 Setting the ATmega406 Coulomb Counter

The Atmega406 chip, contains a dedicated Sigma-Delta ADC optimized for Coulomb Counting to sample the charge or discharge current flowing through an external sense resistor Rs.

This ADC can be configured by selecting the Coulomb Counter tab of the CodeWizardAVR.

Checking the Coulomb Counter Enabled check box enables the Coulomb Counter Sigma-Delta ADC.

The Accumulate Current Conversion Time list box specifies the conversion time for the Accumulate Current output.

The Regular Current Detection Mode check box specifies that the Coulomb Counter will repeatedly do one instantaneous current conversion, before it is turned of for a timing interval specified by the

Sampling Interval list box.

The interval selected using the above-mentioned list box includes a sampling time, having a typical value of 16ms.

The Accumulate Current Interrupt check box enable the generation of an interrupt after the accumulate current conversion has completed. This interrupt is serviced by the ccadc_acc_isr ISR. The Regular Current Interrupt check box enable the generation of an interrupt when the absolute value of the result of the last AD conversion is greater, or equal to, the values of the CADRCC and CADRDC registers. This interrupt is serviced by the ccadc_reg_cur_isr ISR.

The Instantaneous Current Interrupt check box enables the generation of an interrupt when an instantaneous current conversion has completed. This interrupt is serviced by the ccadc_conv_isr ISR.

The Regular Charge Current, respectively Regular Discharge Current, list boxes determine the threshold levels for the regular charge, respectively regular discharge currents, setting the values for the CADRCC, respectively CADRDC, registers used for generating the Regular Current Interrupt.

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The Atmega406 datasheet may be consulted for more details about the Coulomb Counter.

5.11 Setting the SPI Interface

By selecting the SPI tab of the CodeWizardAVR, you can specify the SPI interface configuration.

Checking the SPI Enabled check box enables the on-chip SPI interface.

If you want to generate interrupts upon completion of a SPI transfer, then you must check the SPI Interrupt check box.

You have the possibility to specify the following parameters:

SPI Clock Rate used for the serial transfer

Clock Phase: the position of the SCK strobe signal edge relative to the data bit

Clock Polarity: low or high in idle state

SPI Type: the AVR chip is master or slave

Data Order in the serial transfer.

Checking the Clock Rate x2 check box, available for some AVR chips, will double the SPI Clock Rate.

For communicating through the SPI interface, with disabled SPI interrupt, you must use the SPI Functions.

If the SPI interrupt is enabled, you must use the spi_isr interrupt service routine, declared by the CodeWizardAVR.

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5.12 Setting the Universal Serial Interface - USI

By selecting the USI tab of the CodeWizardAVR, you can specify the USI configuration. The USI operatinging mode can be selected using the Mode list box.

One of the USI operating modes is the Three Wire (SPI) mode:

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The USI can also operate in the Two Wire (I2C) mode:

The Shift Reg. Clock list box sets the clock source for the USI Shift Register and Counter.

As both the USI Shift Register and Counter are clocked from the same clock source, the USI Counter may be used to count the number of received or transmitted bits and generate an overflow interrupt when the data transfer is complete.

Checking the USI Counter Overflow Interrupt check box will generate code for an interrupt service routine that will be executed upon the overflow of the USI Counter.

If the USI Start Condition Interrupt check box is checked then the CodeWizardAVR will generate code for an interrupt service routine that will be executed when a Start Condition is detected on the I2C bus in USI Two Wire operating mode.

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