19CHAPTER ONE

Review of Electronics Fundamentals

or actively driving the data bus to a logic one level. The control signal determines whether the output is passive or active, and is called the output enable or OE signal. The device shown above is actively driving the bus whenever the OE control line is at a logic one level, and is passive when the OE line is at a logic zero level. Most of the time, output enable signals are active low, meaning that the output is enabled when the /OE signal is low, and passive when the /OE signal is high. This is shown on the logic symbol with an inversion bubble where the enable signal enters the logic device.

As computer circuits become more dense and complex, the connecting wires have become increasingly difficult to route and interconnect. This is especially true on a densely packed integrated circuit, where it turns out that the wiring is more valuable than the logic gates! On one common CPU chip, 68% of the chip area is used for interconnect wiring. Even on a circuit board, it is important to use the board wiring in an efficient way. Since there are many parallel address and data lines that must go to multiple chips, the multiplexing approach makes it practical to connect many devices. The purpose for using tri-state logic is to allow multiple devices to share wires by taking turns one at a time. This may sound a bit silly, but it is just one form of multiplexing, or sharing a resource that needs to be allocated among multiple devices. When the resource is a collection of parallel data wires, referred to as a data bus, and the bus is shared by multiple microcomputer CPU and peripheral devices transferring information one at a time in sequence, it is referred to as a multiplexed data bus.

Timing Diagrams

The timing diagram is the standard “language” of illustrating timing relationships between different parts of a design. In order to understand the relationship of different signals with respect to time, it is necessary to learn how to read and interpret timing diagrams. Figure 1-20 shows examples of asynchronous (un-clocked or combinatorial gates) and synchronous (clocked flip-flop) logic. The notation used in this book is representative of that used in most component specifications. Timing specifications, such as delay, setup, and hold times, specify the limits under which the device is guaranteed to operate as intended. If those specifications are violated, the device may very well operate correctly most of the time. However, a change in temperature, voltage, or variations from unit to unit may make the circuit unreliable. The most

21CHAPTER ONE

Review of Electronics Fundamentals

Timing diagrams are a critical method to allow accurate and unambiguous representation of the time related operations of digital circuits, which we will be using to understand and document the correct sequence of operations for microcomputer systems. Timing analysis, using these diagrams, allows the designer to determine safe and reliable limits to proper operation of the various circuits in the system. It is better to take a little more time to design a circuit correctly from the start than it is to find and fix bugs during testing. This is especially true because of the increasing cost of fixing a bug as a product progresses through production and into the field.

Loading and Noise Margin Analysis

In addition to timing, the designer must consider the voltages and loads at the logic inputs and outputs. If the output of one gate is connected to the input of another, the designer must assure that the logic voltages are compatible. Once again, just as for the timing, violations of these specifications often result in infrequent errors that are very tricky to reproduce. Again, prevention is much simpler than tracking down bugs as they appear in production units. This topic is the subject of Chapter Three.

The Design and Development Process

Structured design of a microcomputer requires the ability to do the system design and partitioning from the top down while implementing the system from the bottom up. The hardware design and development process should consist of the following steps:

1)Defining the requirements.

2)Collecting information on potential components.

3)Evaluate the components with respect to the requirements.

4)Do a block diagram preliminary design and component selection.

5)Perform a preliminary timing and loading analysis.

6)Define the functions of the “glue logic.”

7)Schematic entry using CAD (computer-aided design) software.

8)Programmable logic device design and simulation.

22EMBEDDED CONTROLLER

Hardware Design

9)Detailed timing analysis and simulation, adjusting the design as required.

10)Check the signal loading, buffering signals as needed.

11)Document the design and generate a net list and bill of materials.

12)Begin the design and layout of a printed circuit board.

13)Implement the design in breadboard or prototype form.

14)Program the memories and programmable logic as required for testing.

15)Debug and verify operation using oscilloscope, logic analyzer, and in-circuit emulator.

16)Update and complete documentation as the design changes.

The order of tasks shown is variable, and some of the tasks may be performed in parallel. Software design is also frequently done in parallel with hardware design, and sometimes even before the hardware design. This is frequently a result of the fact that the cost and time required to develop the software exceeds that of the hardware development. In some cases the cost of modifying existing programs may be so high as to be impractical. In these cases, it is the designer’s responsibility to maintain software compatibility with previous hardware designs.

Chapter One Problems

1.If an open-drain N-channel FET transistor is used as a logic output, is it possible to connect more than one open-drain transistor output to the same signal? What would the effect of doing so be on the resulting combined signal?

2.If a logic output sinks IOL = 10 milliamperes with an output voltage, VOL = 0.5 volts, how much power is dissipated by a 450 ohm resistor between the output and the 5 volt power supply?

3.How much current must a logic output source, in order to maintain an output voltage of 2.5 volt when driving a 5 kilohm resistor connected to ground?

4.In a CMOS inverter, there is a short period of time when both the N- and P-channel transistors are partially turned on when the input is changing from low to high or high to low. What effect will this have on power consumption? What characteristic in the input signal would reduce this effect?

Microcontroller Concepts

One way of looking at a computer system is to consider the successive “translations” that occur from the high level code (a programming language such as C++) to the electrical signals that “communicate” with the hardware. A computer system can be broken down into multiple levels or layers to show the translation of a specific instruction into a form that can be directly processed by the computer hardware. Such hierarchical levels are discussed in detail in Structured Computer Organization by A.S. Tanenbaum. This hierarchy is shown in Figure 2-1

Figure 2-1: “Layers” of a computer system.

Language translators such as compilers and assemblers translate highlevel code into machine code that can be executed by the processor. The primary focus of this book will be from the assembly and machine language level downward.