- •Table of Contents
- •Objectives
- •Embedded Microcomputer Applications
- •Microcomputer and Microcontroller Architectures
- •Digital Hardware Concepts
- •Voltage, Current, and Resistance
- •Diodes
- •Transistors
- •Mechanical Switches
- •Transistor Switch ON
- •Transistor Switch OFF
- •The FET as a Logic Switch
- •NMOS Logic
- •CMOS Logic
- •Mixed MOS
- •Real Transistors Don’t Eat Q!
- •Logic Symbols
- •Tri-State Logic
- •Timing Diagrams
- •Multiplexed Bus
- •Loading and Noise Margin Analysis
- •The Design and Development Process
- •Chapter One Problems
- •Organization: von Neumann vs. Harvard
- •Microprocessor/Microcontroller Basics
- •Microcontroller CPU, Memory, and I/O
- •Design Methodology
- •The 8051 Family Microcontroller
- •Processor Architecture
- •Introduction to the 8051 Architecture
- •8051 Memory Organization
- •8051 CPU Hardware
- •Oscillator and Timing Circuitry
- •The 8051 Microcontroller Instruction Set Summary
- •Direct and Register Addressing
- •Indirect Addressing
- •Immediate Addressing
- •Generic Address Modes and Instruction Formats
- •8051 Address Modes
- •The Software Development Cycle
- •Software Development Tools
- •Hardware Development Tools
- •Chapter Two Problems
- •Timing Diagram Notation Conventions
- •Rise and Fall Times
- •Propagation Delays
- •Setup and Hold Time
- •Tri-State Bus Interfacing
- •Pulse Width and Clock Frequency
- •Fan-Out and Loading Analysis—DC and AC
- •Calculating Wiring Capacitance
- •Fan-Out When CMOS Drives LSTTL
- •Transmission Line Effects
- •Ground Bounce
- •Logic Family IC Characteristics and Interfacing
- •Interfacing TTL Compatible Signals to 5 Volt CMOS
- •Design Example: Noise Margin Analysis Spreadsheet
- •Worst-Case Timing Analysis Example
- •Chapter Three Review Problems
- •Memory Taxonomy
- •Secondary Memory
- •Sequential Access Memory
- •Direct Access Memory
- •Read/Write Memories
- •Read-Only Memory
- •Other Memory Types
- •JEDEC Memory Pin-Outs
- •Device Programmers
- •Memory Organization Considerations
- •Parametric Considerations
- •Asynchronous vs. Synchronous Memory
- •Error Detection and Correction
- •Error Sources
- •Confidence Checks
- •Memory Management
- •Cache Memory
- •Virtual Memory
- •CPU Control Lines for Memory Interfacing
- •Chapter Four Problems
- •Read and Write Operations
- •Address, Data, and Control Buses
- •Address Spaces and Decoding
- •Address Map
- •Chapter Five Problems
- •The Central Processing Unit (CPU)
- •Memory Selection and Interfacing
- •Preliminary Timing Analysis
- •External Data Memory Cycles
- •External Memory Data Memory Read
- •External Data Memory Write
- •Design Problem 1
- •Design Problem 2
- •Design Problem 3
- •Completing the Analysis
- •Chapter Six Problems
- •Introduction to Programmable Logic
- •Technologies: Fuse-Link, EPROM, EEPROM, and RAM Storage
- •PROM as PLD
- •Programmable Logic Arrays
- •PAL-Style PLDs
- •Design Examples
- •PLD Development Tools
- •Simple I/O Decoding and Interfacing Using PLDs
- •IC Design Using PCs
- •Chapter Seven Problems
- •Direct CPU I/O Interfacing
- •Port I/O for the 8051 Family
- •Output Current Limitations
- •Simple Input/Output Devices
- •Matrix Keyboard Input
- •Program-Controlled I/O Bus Interfacing
- •Real-Time Processing
- •Direct Memory Access (DMA)
- •Burst vs. Single Cycle DMA
- •Cycle Stealing
- •Elementary I/O Devices and Applications
- •Timing and Level Conversion Considerations
- •Level Conversion
- •Power Relays
- •Chapter Eight Problems
- •Interrupt Cycles
- •Software Interrupts
- •Hardware Interrupts
- •Interrupt Driven Program Elements
- •Critical Code Segments
- •Semaphores
- •Interrupt Processing Options
- •Level and Edge Triggered Interrupts
- •Vectored Interrupts
- •Non-Vectored Interrupts
- •Serial Interrupt Prioritization
- •Parallel Interrupt Prioritization
- •Construction Methods
- •Power and Ground Planes
- •Ground Problems
- •Electromagnetic Compatibility
- •Electrostatic Discharge Effects
- •Fault Tolerance
- •Hardware Development Tools
- •Instrumentation Issues
- •Software Development Tools
- •Other Specialized Design Considerations
- •Thermal Analysis and Design
- •Battery Powered System Design Considerations
- •Processor Performance Metrics
- •Benchmarks
- •Device Selection Process
- •Analog Signal Conversion
- •Special Proprietary Synchronous Serial Interfaces
- •Unconventional Use of DRAM for Low Cost Data Storage
- •Digital Signal Processing / Digital Audio Recording
- •Detailed Checklist
- •1. Define Power Supply Requirements
- •2. Verify Voltage Level Compatibility
- •3. Check DC Fan-Out: Output Current Drive vs. Loading
- •4. AC (Capacitive) Output Drive vs. Capacitive Load and De-rating
- •5. Verify Worst Case Timing Conditions
- •6. Determine if Transmission Line Termination is Required
- •7. Clock Distribution
- •8. Power and Ground Distribution
- •9. Asynchronous Inputs
- •10. Guarantee Power-On Reset State
- •11. Programmable Logic Devices
- •12. Deactivate Interrupt and Other Requests on Power-Up
- •13. Electromagnetic Compatibility Issues
- •14. Manufacturing and Test Issues
- •Books
- •Web and FTP Sites
- •Periodicals: Subscription
- •Periodicals: Advertiser Supported Trade Magazines
- •Index
169CHAPTER EIGHT
Basic I/O Interfaces
device’s inputs are driven by a separately powered device. When power is applied to the previously unpowered device, having the inputs at a higher level than the supply voltage can cause latch-up. By using a resistor in series with the input, as shown in the previous figure, it is possible to limit the current in these conditions to a level which will not cause latch-up to occur.
The 80C32 parameters are different than other members of the 8051 family. The Atmel 89C2051, a low cost 20-pin version, has greater output drive capability than the 80C32. Depending upon which port is used and how it is configured, the output capabilities can also vary, even on the same device.
Processors other than the 8051 family of devices frequently have different characteristics, including: standard tri-state outputs with higher drive capacity and data direction control registers, and much higher output source and sink currents. For example, the Microchip PIC family of processors has devices that are capable of sinking and sourcing up to 25 milliamperes per pin. Note that the price for the higher drive capability is the requirement to write to the data direction register for bi-directional I/O functions, and the potential for bus contention problems. Higher output drive on any microcontroller can be accomplished using external power control devices, designed for driving motors, solenoids, valves, and other larger loads. Some of these devices have additional features, such as current limiting, over temperature shutdown, and so forth. Some also have limited logic built in, and are often referred to as “smart power” devices.
There are several common types of I/O device which can be directly connected to the processor, including simple switches, keypads, LEDs, and LCDs. Input devices can be divided into three categories: simple switches, multiplexed keyboards, and intelligent keyboards as used on the desktop PC. The displays can also be divided into three groups: simple on/off indicators, multiplexed LED or LCD displays, and intelligent display modules. People can also be classified into three groups: those who divide things into groups, those who do not, and those who have no opinion.
Simple Input/Output Devices
The switch is probably the simplest of all input devices, and one of the most useful. Hardware interfacing is quite simple, and for CPUs that have internal pull-ups like the 8051, all that need be done is connect the switch between
170EMBEDDED CONTROLLER
Hardware Design
the pin and ground. As can be seen from Figure 8-7, the input will be a logic one when the switch is open, and logic zero when the switch is closed. Unfortunately switch contacts bounce when they are closed and sometimes when they are broken. This causes
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Matrix Keyboard Input
The next step up in input complexity is the matrix keypad or keyboard. These switch arrays are usually organized into a number of rows and columns, like the 4-by-3 array of 12 buttons on a telephone. These matrix-connected devices can be multiplexed to reduce the number of I/O lines required to sense the keys. If a 4-row-by-4-column keypad were implemented using separate inputs, one per switch, a total of 16 input pins would be required. Since I/O pins are almost always at a premium, this is not the best approach.
By arranging the switch contacts to short the row and column lines corresponding to their position in the matrix, the number of lines can be reduced. By selecting one column at a time and looking for activity on any of the row inputs, the program can determine which key has been depressed. One row output can be driven low at a time, and the column input bits are read to see if any of them are low. A low column input indicates that the switch belonging to the corresponding row and column is closed. Multiplexing allows the rows and columns to be scanned for activity under software control. In the case of sixteen keys, only four columns and four rows would be required, or a total of eight I/O pins, compared to 16 for the simple one input per switch approach. For the processors like the 8051 with built-in pull-ups, the only thing that is required is the key switch matrix. A key switch matrix like this can be implemented very inexpensively by using a standard matrix keypad, or by attaching steel switch domes to a PC board with row and column contacts, encapsulated
171 CHAPTER EIGHT
172EMBEDDED CONTROLLER
Hardware Design
many other types of displays, such as most LCDs. In each case, the flicker of the display is normally not apparent to the observer. You can see the strobelike effect by waving your fingers quickly in front of a multiplexed display.
An array of LEDs or seven segment numeric LED displays can be illuminated this way, using many fewer I/O pins than would be required by using one pin per LED, as shown in Figure 8-9.
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Figure 8-9: Multiplexed LED display.
The display is scanned, or refreshed, by activating the column, and then the row bits that correspond to the LEDs in that column which should be lit. The display is left on for a short period, then switched to the next column and row, and so on. As long as the display is refreshed frequently enough, there is no visible flicker.
Another type of display is the LCD. The simplest of these is just a glass panel with extremely thin metalized connections to the segments. These are rather complex to drive directly from most microcontrollers, but there are two ways that they can be connected without much effort. The simplest, but more expensive approach, is to use an intelligent LCD module complete with the drive electronics. Most of these devices use a standard controller, and can be driven using either a 4-bit bus or an 8-bit bus. Serial input devices are also available, which can be driven directly from a standard RS-232 serial port. They are available in text-only display versions, ranging in size from one row of 16