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Файл:Basics of electronics. Study aid
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M
0.9
0.1
0
V
V
V
m
m
m
V
out
t
t
r
t
f
Fig. 9.34. Illustrating rise time tr and fall time t
f
Apart from values of V1 and V2 the significant voltage definition is
the difference between V
voltage (V
p-p
).
Mark to Space Ratio M/S: If we suppose that V
when a switch is OFF and V
duration and t
is the space duration, thus
2
Duty Cycle is defined as the ratio of ‘ON’ time (t
and V2 which is referred to as the peak-to-peak
1
in fig. 9.33 occurs
1
occurs when a switch is ON, then t1 is the mark
2
t
1
– is the ratio of t1 to t2.
St
2
) to ‘TOTAL’
1
time (T), so for fig. 9.33
Duty cycle
11
tt T
12
.
tt
A waveform with M/S = 1, i. e. duty cycle equals 0.5, is usually called
a square wave.
Off-Duty Factor is defined as the ratio of ‘TOTAL’ time (T) to ‘ON’
time (t
), thus we have
1
Off - duty factor
T
t Duty cycle
1
1
.
Multivibrators
A multivibrator (M/V) is a circuit which at any instant, can have only
one of two output voltage levels, except during a transition, and which
switches between these levels rapidly. Thus the circuit shown in fig. 9.35(a)
might produce a waveform such as in fig. 9.35(b) where V
is Vm (for
out
example +12 V) or 0 V.
These two voltage values are called the two states of the circuit which
can be classified as:
Stable – if the circuit does not change to the other state unless
a)
externally triggered;
121
b) Quasistable – if the circuit remains at that particular output voltage
for a period (say t
) determined by the circuit components before switching to
1
the other state without any external trigger.
V
out
V
m
T rigger
V
M/V
out
0
t
(a) (b)
Fig. 9.35. Multivibrator: (a) block diagram; (b) waveforms
When the circuit is switching between states it is said to be unstable or
in a transient condition.
These definitions of states lead us to the following definitions of
circuits.
Bistable M/V or Flip Flop: Both states are stable and the circuit changes the
state only when triggered, as indicated by the waveforms at the top of fig. 9.36.
Monostable M/V or One-shot: One state (V
the other (V
) is quasistable. The circuit rests in its stable state until triggered
2
in fig. 9.36) is stable and
1
into the quasistable state where it remains for the predetermined period t
before returning to the stable state. Note that while t
is fixed, the time
1
between pulses depends on the triggers.
1
Trigger
V
out
V
V
Trigger
V
out
V
V
V
out
2
1
2
1
t
t
1
1
t
1
t
1
t
2
t
1
t
1
t
2
t
t
1
t
2
t
Bistable M/V
t
t
1
Monostable M/V
t
Astable M/V
t
Fig. 9.36. M/V waveforms: bistable, monostable and astable
122
Astable M/V: Both states are quasistable, so the circuit simply switches
between the two states (fig. 9.36), each of which having its own fixed
duration. The circuit is therefore free running and does not require triggering.
However, it can be triggered to bring circuit into synchronization with
another signal.
Op-Amp Multivibrators
To explain the op-amp astable M/V circuit
+V
cc
we begin with an ideal op-amp (fig. 9.37) having
equal but opposite d.c. supplies +V
and –VCC.
CC
These and three terminal voltage waveforms V
and V
V
2
are referenced to the earth rail N.
out
V
1
,
1
V
2
–
V
out
+
Before considering the astable M/V the
main point to keep in mind is that the op-amp
is a differential amplifier. Therefore, if
V = V
– V1 is positive, V
2
= +VCC because
out
the op-amp is assumed to have infinite gain, so
is limited by the positive supply voltage
V
out
V
. Likewise, if V is negative, V
CC
For example, even if both V
V
= +3.1 V, V = 0.1 V, so V
2
out
= –VCC.
out
and V2 are positive but V1 = +3 V and
1
= +VCC.
Fig. 9.37. Op-amp power
supply connection
-V
cc
N
When the astable M/V of fig. 9.38 is switched on then, because of
imbalance, offsets, etc., the output V
say +V
CC
.
will go to one of the supply voltages,
out
R
-
V
+
V
C
V
out
R1
R2
V
out
Fig. 9.38. Op-amp astable M/V
If we now look at the noninverting input terminal V + we see that it is
connected to the R
voltage across R
.
2
potential divider chain with V2 being equal to the
1R2
123
R
R
Defining the potential division ratio as
to
V
. At switch-on then,
out
VV
These switch-on voltages for V
CC
and V + are marked on the respective
out
.
waveforms in fig. 9.39 at t = 0. At switch-on, capacitor C is uncharged, so V
2
, V + is always equal
RR
12
–
equals 0 V as indicated in the figure.
There is a voltage V
through R and begins to charge C. Therefore, V
towards V
+
V
it becomes more positive than V +. This means that V is now
CC
with a time constant
CC
negative, so the circuit switches, at t
across R at switch-on, so a current i flows
CC
C
. However, when V
, to
1
–
begins to rise exponentially
VV
out CC
. It is from this instant
–
passes through
that the circuit begins its normal switching sequence and from which we can
calculate the state durations.
–
Current i through R and C is now reversed. V
()
V
exponentially towards
()
V
the level
+
V
to
V
CC
, V becomes positive, so V
CC
.
(from t1 to t2) but as soon as it passes through
CC
out
switches back to
will now fall
V
and
CC
+
-
+
V
-
out
+V
-V
V
V
V
V
V
V
cc
0
cc
cc
0
cc
0
cc
+
cc
t
t
1
-
t
2
V
+
cc
t
t
-V
cc
Fig. 9.39. Op-amp astable M/V waveforms
124
Clearly, both states are quasistable, so the circuit is an astable M/V. In this
p
case it is symmetrical, so the positive and negative pulse durations are equal:
1
t t RC RC
pos neg
t
where
is the time of a half-cycle of the complete waveform.
os
The waveform frequency is as follows:
ln ln 1 2 ,
1
f
EXAMPLE
For the given
waveforms V
+
M/V circuit draw the
, V – and V
, marking the
out
value of the voltages of the waveform
extremities. Use the waveforms to
calculate the output waveform frequency
and duty cycle.
Solution:
R
2
RR
12
10 k 10 2
5k 10k 15 3
;
2
V
CC
15 10 V
3
5k 4 F 20msRC
R
R
2
1
1
.
2
t
pos
R
C
4F
;
;
5k
+15V
-15V
R1
5k
R2
10k
V
out
ttRC
pos neg
1 1.666
ln 20 ms ln 20 ms ln 5 32 ms
1 0.333
11
31 Hz
1
0.5
22
9.3.3. The 555 Timer
f
Duty cycle
2232ms
t
pos
tt
pos pos
tt t
pos neg pos
We have seen that Multivibrators and Oscillators can
be easily constructed from discrete components to produce
relaxation oscillators for generating basic square wave
output waveforms. But there are also dedicated ICs
especially designed to produce the required output
waveform with the addition of just a few extra timing
components. One such device that has been around since
125
the early days of ICs and has itself become something of an industry ‘standard’
is the
555 Timer Oscillator which is commonly called the ‘555 Timer’.
The 555 Timer is a very cheap, popular and useful precision timing
device that can act either as a simple timer to generate single pulses or long
time delays, or as a relaxation oscillator producing stabilized waveforms of
varying duty cycles. The 555 timer chip is extremely robust and stable 8-pin
device that can be operated as a very accurate
Monostable, Bistable or
Astable Multivibrator. It can be used in a variety of applications such as one-
shot or delay timers, pulse generation, tone generation, logic clocks,
frequency division and others, in fact, any circuit that requires some form of
time control as the list is endless.
The single 555 Timer chip is a Bipolar 8-pin mini Dual-in-line Package
(DIP) device consisting of some 25 transistors, 2 diodes and about 16
resistors arranged to form two comparators, a flip-flop and a high current
output stage. There is also the NE556 Timer Oscillator which combines two
individual 555s within a single 14-pin DIP package and low power CMOS
versions of the single 555 timer such as the 7555 and LMC555 which use
MOSFET transistors instead.
A simplified ‘block diagram’ representing the internal circuitry of the
555 timer is given below with a brief explanation.
555 Timer Block Diagram
Threshold
Control
voltage
Trigger
Discharge
+V
CC
Supply
8
+V
R
DA1
6
5
R
DA2
2
R
7
1
VT1
Ground
DD1
R
S
Flip-flop
ref
VT2
4
Reset
T
Q
DD2
3
Output
Output
Driver
Fig. 9.40. Block diagram of 555 timer
126
• Pin 1 Ground, The ground pin connects the 555 timer to the negative
a
t
d
d
(0V) supply rail.
• Pin 2
Trigger, The negative input to comparator DA
. A negative pulse
1
on this pin ‘sets’ the internal Flip-flop when the voltage drops
below 1/3V
causing the output to switch from a ‘LOW’ to
CC
‘HIGH’ state.
• Pin 3
Output, The output pin can drive any TTL circuit and is capable
of sourcing or sinking up to 200mA of current at an outpu
voltage equal to approximately V so small speakers,
V
CC
5.1
LEDs or motors can be connected directly to the output.
• Pin 4
Reset, This pin is used to ‘reset’ the internal Flip-flop controlling
the state of the output, pin 3. This is an active-low input and is
generally connected to a logic ‘1’ level when it is not used to
prevent any unwanted resetting of the output.
• Pin 5
Control Voltage, This pin controls the timing by overriding the
2/3V
level of the voltage divider network. By applying a voltage
CC
to this pin the width of the output signal can be varie
independently of the RC timing network. When this pin is not use
it is connected to ground via a 10nF capacitor to eliminate any
noise.
• Pin 6
Threshold, The positive input to comparator DA
. This pin is used
2
to reset the Flip-flop when the voltage applied to it exceeds
2/3V
, which causes the output to switch from ‘HIGH’ to ‘LOW’
CC
state. This pin connects is directly connected to the RC timing
circuit.
• Pin 7
Discharge, The discharge pin is connected directly to the
Collector of an internal n-p-n transistor VT
which is used to
1
‘discharge’ the timing capacitor to ground when the output at pin 3
switches to ‘LOW’ state.
• Pin 8
Supply +V
, This is the power supply pin. For general purpose
CC
TTL 555 timer power supply voltage is between 4.5 V and 16 V.
127
The 555 Timers’ name comes from the fact that there are three 5 k
resistors connected together internally producing a voltage divider network
between the supply voltage at pin 8 and ground at pin 1. The voltage across
this resistive network holds the positive input of comparator DA
and the positive input to comparator DA
at 1/3VCC. The two comparators
1
at 2/3VCC
2
produce an output voltage dependent upon the voltage difference at their
inputs which is determined by charging and discharging action of the
externally connected RC network. The outputs from both comparators are
connected to the two inputs of the flip-flop which in turn produces either a
‘HIGH’ or ‘LOW’ level output at Q based on the states of its inputs. The
output from the flip-flop is used to control a high current output switching
stage to drive the connected load producing either a ‘HIGH’ or ‘LOW’
voltage level at the output pin.
The 555 timer oscillator is commonly used as a simple astable oscillator
by connecting two resistors and a capacitor across its terminals to generate a
fixed pulse train with a time period determined by the time constant of the
RC network. But the 555 timer oscillator chip can also be connected in a
variety of different ways to produce Monostable or Bistable multivibrators.
The Monostable 555 Timer
Consider the 555 Monostable circuit below.
Trigger
1/3(V
2/3(V
V
+V
cc
V
cc
out
0
C1
0
cc
)
t
+V
t
rest
cc
t
)
t
pulse
R1
C1
7
Discharge
6
Threshold
2
Trigger
+V
cc
84
Supply
GND
1
Reset
Output
Control
V
3
5
out
C2
0
t
Fig. 9.41. Monostable 555 timer oscillator
When a negative (0 V) pulse is applied to the trigger input (pin 2) of the
Monostable configured 555 Timer oscillator, the internal comparator DA
1
detects this input and ‘sets’ the state of the flip-flop, changing the output
from a ‘LOW’ state to a ‘HIGH’ state. This action turns ‘OFF’ the discharge
128
transistor (pin 7) and removes the short circuit across the external timing
p
p
capacitor, C
resistor R
voltage of 2/3V
this point the output of comparator DA
. This allows the timing capacitor to start to charge up through
1
until the voltage across the capacitor reaches the threshold (pin 6)
1
which is set up by the internal voltage divider network. At
CC
goes ‘HIGH’ and ‘resets’ the flip-
1
flop back to its original state which turns ‘ON’ the transistor and discharges
the capacitor to ground through pin 7. This action also causes the output to
change its state back to the original stable ‘LOW’ value. After that the
oscillator waits for another trigger pulse to start the timing process over
again. Then the Monostable Multivibrator has only one stable state.
The Monostable 555 Timer circuit triggers on a negative-going pulse
applied to pin 2 and this trigger pulse must be much shorter than the output
pulse width allowing time for the timing capacitor to charge and then
discharge fully. Once triggered, the 555 Monostable remains in this ‘HIGH’
unstable output state until the time period set up by the R
network has
1C1
elapsed. The time that the output voltage remains ‘HIGH’ or at a logic ‘1’
level, is given by the following equation.
where
tRC
t
is in seconds, R is in Ohms and C in Farads.
ulse
pulse
1.1
,
11
EXAMPLE
Monostable 555 Timer is required to produce a time delay within a
A
circuit. If a 10
required to produce an output time delay (
F timing capacitor is used, calculate the value of the resistor
t
) of 500 ms.
ulse
Solution:
500 ms is the same as saying 0.5 s, and by rearranging the formula
above, we get the value for the resistor R:
t
pulse
R
1.1 1.1 10 10
C
0.5
6
45.5 k
.
The calculated value for the timing resistor needed to produce the
required time constant of 500 ms is 45.5 k’s which does not exist as a
standard value resistor. So we would need to select the nearest preferred
value resistor of 47 k’s which is available in all the standard ranges of
tolerance from the E12 (10 %) to the E96 (1 %), giving us a new recalculated
time delay of 517 ms. If this time difference of 17 ms (500–517 ms) is
unacceptable a lower preferred value timing resistor can be selected and
connected in series with a trimming resistor to adjust the pulse width to the
desired value.
129
We can manually calculate the values of R and C for the required
individual components as we did in the example above. We can make our life
a little easier by using nomographs to show the monostable multivibrators
expected frequency output for different combinations or values of both the R
and C. For example,
100
10
1
0.1
0.01
0.001
10ms 100ms 1s 10s 100s10s100s1ms
t
- Time Delay
pulse
Fig. 9.42. Monostable nomograph
By selecting suitable values of C and R in the ranges of 0.001 F to
F and 1 k to 10 M’s respectively, we can find the expected output
100
frequency directly from the nomograph thereby eliminating any error in the
calculations. In practice the value of the timing resistor for a monostable 555
timer should not be less than 1 k or greater than 20 M.
The Bistable 555 Timer
The 555 Bistable is one of the simplest circuits we can build using the
555 timer oscillator chip. This bistable configuration does not use any RC
timing network to produce an output waveform so no equations are required
to calculate the time period of the circuit. Consider the Bistable 555 Timer
circuit below.
The switching of the output waveform is achieved by controlling the
trigger and reset inputs of the 555 timer which are held ‘HIGH’ by the two
pull-up resistors, R
and R2. When we take the trigger input (pin 2) ‘LOW’,
1
switch in set position, the output state changes into the ‘HIGH’ state and
when we take the reset input (pin 4) ‘LOW’, switch in reset position, the
output changes into the ‘LOW’ state. This 555 timer circuit remains in either
state indefinitely and is, therefore, bistable. Thus, the
Bistable 555 timer is
stable in both states, ‘HIGH’ and ‘LOW’. The threshold input (pin 6) is
130
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