- •Э. Таненбаум
- •Глава 2. Организация компьютерных систем 56
- •Глава 3. Цифровой логический уровень 139
- •Глава 4. Микроархитектурный уровень 230
- •Глава 5. Уровень архитектуры команд 334
- •Глава 6. Уровень операционной системы 437
- •Глава 7. Уровень языка ассемблера 517
- •Глава 8. Архитектуры компьютеров параллельного
- •Глава 9. Библиография 647
- •Глава 8 (архитектура компьютеров параллельного действия) полностью изменена. В ней подробно описываются мультипроцессоры (uma, numa и сома) и мультикомпьютеры (мрр и cow).
- •Глава 1
- •Глава 2 знакомит читателей с основными компонентами компьютера: процессорами, памятью, устройствами ввода-вывода. В ней дается краткое описание системной архитектуры и введение к следующим главам.
- •Глава 2
- •Центральный процессор Центральный процессор
- •12 Битов б
- •24 Входные линии
- •50 Входных линий
- •Глава 4
- •Старший бит
- •Блок выборки команд
- •Сигналы управления
- •Глава 5
- •Intel ia-64
- •Глава 6
- •Глава 7
- •3. Сведения о том, можно ли получить доступ к символу извне процедуры.
- •Глава 8
- •64 Элемента на каждый регистр
- •Intel/Sandia Option Red
- •00 Процессор 2
- •Глава 9
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- •In Shared Memory Multiprocessing», ieee Computer Magazine, vol. 30, p. 4450, Dec. 1997.
- •78Jan.-March 1999.
- •0 123456789Abcdef
- •I и Ijmii him
- •Э. Таненбаум
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