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Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

GENERAL-PURPOSE I/O (PORT C)

:

 

:

 

MOVEP #$0,X:$FFE1

;Select Port C to be general-purpose I/O

MOVEP #$01F0,X:$FFE3

;Select pins PC0–PC3 to be inputs

:

;and pins PC4–PC8 to be outputs

:

 

MOVEP #data_out,X:$FFE5

;Put bits 4–8 of “data_out” on pins

 

;PB4–PB8 bits 0–3 are ignored.

MOVEP X:$FFE0,#data_in

;Put PB0–PB3 in bits 0–3 of “data_in”

Figure 6-6 Write/Read Parallel Data with Port C

I/O processing.

The DSP does not have a hardware data strobe to strobe data out of the GPIO port. If a data strobe is needed, it can be implemented using software to toggle one of the GPIO pins.

Figure 6-7 shows the process of programming Port C as general-purpose I/O. Normally, it is not good programming practice to activate a peripheral before programming it. However, reset activates the Port C general-purpose I/O as all inputs, and the alternative is to configure the port as an SCI and/or SSI, which may not be desirable. In this case, it is probably better to insure that Port C is initially configured for gener- al-purpose I/O and then configure the data direction and data registers. It may be better in some situations to program the data direction or the data registers first to prevent two devices from driving one signal. The order of steps 1, 2, and 3 in Figure 6-7 is optional and can be changed as needed.

6.2.2Port C General Purpose I/O Timing

Parallel data written to Port C is delayed by one instruction cycle. For example, the following instruction:

MOVE DATA9,X:PORTC DATA24,Y:EXTERN

1.writes nine bits of data to the Port C register, but the output pins do not change until the following instruction cycle

2.writes 24 bits of data to the external Y memory, which appears on Port A during T2 and T3 of the current instruction

As a result, if it is necessary to synchronize the Port A and Port C outputs, two instructions must be used:

MOVE

DATA9,X:PORTC

 

NOP

DATA24,Y:EXTERN

 

 

 

 

 

 

 

MOTOROLA

PORT C

6 - 7

 

For More Information On This Product,

 

 

Go to: www.freescale.com

 

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

GENERAL-PURPOSE I/O (PORT C)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

23

16

15

8

7

 

0

 

 

 

 

 

 

X:$FFFF

 

 

 

 

 

 

 

 

 

 

 

INTERRUPT PRIORITY REGISTER (IPR)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFFE

 

 

 

 

 

 

 

 

 

 

 

PORT A — BUS CONTROL REGISTER (BCR)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFFD

 

 

 

 

 

 

 

 

 

 

 

PLL CONTROL REGISTER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFFC

 

 

 

 

 

 

 

 

 

 

 

OnCE GDB REGISTER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFFB

 

 

 

 

 

 

 

 

 

 

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFFA

 

 

 

 

 

 

 

 

 

 

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF9

 

 

 

 

 

 

 

 

 

 

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF8

 

 

 

 

 

 

 

 

 

 

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF7

 

 

 

 

 

 

 

 

 

 

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF6

 

 

 

 

 

 

 

 

 

 

 

SCI HI - REC/XMIT DATA REGISTER (SRX/STX)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF5

 

 

 

 

 

 

 

 

 

 

 

SCI MID - REC/XMIT DATA REGISTER (SRX/STX)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF4

 

 

 

 

 

 

 

 

 

 

 

SCI LOW - REC/XMIT DATA REGISTER (SRX/STX)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF3

 

 

 

 

 

 

 

 

 

 

 

SCI TRANSMIT DATA ADDRESS REGISTER (STXA)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF2

 

 

 

 

 

 

 

 

 

 

 

SCI CONTROL REGISTER (SCCR)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF1

 

 

 

 

 

 

 

 

 

 

 

SCI INTERFACE STATUS REGISTER (SSR)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFF0

 

 

 

 

 

 

 

 

 

 

 

SCI INTERFACE CONTROL REGISTER (SCR)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFEF

 

 

 

 

 

 

 

 

 

 

 

SSI RECIEVE/TRANSMIT DATA REGISTER (RX/TX)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFEE

 

 

 

 

 

 

 

 

 

 

 

SSI STATUS/TIME SLOT REGISTER (SSISR/TSR)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFED

 

 

 

 

 

 

 

 

 

 

 

SSI CONTROL REGISTER B (CRB)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFEC

 

 

 

 

 

 

 

 

 

 

 

SSI CONTROL REGISTER A (CRA)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFEB

 

 

 

 

 

 

 

 

 

 

 

HOST RECEIVE/TRANSMIT REGISTER (HRX/HTX)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFEA

 

 

 

 

 

 

 

 

 

 

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X:$FFE9

 

 

 

 

 

 

 

 

 

 

 

HOST STATUS REGISTER (HSR)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6 - 8 PORT C MOTOROLA

For More Information On This Product, Go to: www.freescale.com

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

GENERAL-PURPOSE I/O (PORT C)

STEP 1. SELECT EACH PIN TO BE GENERAL-PURPOSE I/O OR AN ON-CHIP PERIPHERAL PIN:

 

 

 

 

 

 

 

 

CCx = 0

 

 

 

 

GENERALPURPOSE I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CCx = 1

 

 

 

 

ON-CHIP PERIPHERAL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CC

CC

 

CC

CC

CC

CC

CC

 

CC

CC

 

 

 

 

 

 

 

 

 

 

PORT C CONTROL REGISTER (PCC)

X:$FFE1

 

 

 

8

 

 

7

 

 

6

 

 

5

 

 

4

 

 

3

 

 

2

 

 

1

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

STEP 2. SET EACH GENERAL - PURPOSE I/O PIN (SELECTED ABOVE) AS INPUT OR OUTPUT:

CDx = 0 INPUT PIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CDx = 1

 

 

 

 

OUTPUT PIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CD

CD

CD

CD

CD

CD

CD

CD

 

CD

 

 

 

X:$FFE3

 

 

8

 

 

7

 

 

6

 

5

 

4

 

3

 

 

2

 

 

1

 

 

0

 

 

 

PORT C DATA DIRECTION REGISTER (PCDDR)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

STEP 3. READ/WRITE GENERAL - PURPOSE I/O PINS:

PCx = OUTPUT DATA IF SELECTED FOR GENERAL - PURPOSE I/O AND OUTPUT IN STEPS 1 AND 2. OR

PCx = INPUT DATA IF SELECTED FOR GENERAL - PURPOSE I/O AND INPUT IN STEPS 1 AND 2.

 

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PC

PC

PC

PC

PC

PC

PC

PC

 

PC

 

 

 

X:$FFE5

 

 

8

 

 

7

 

 

6

 

 

5

 

 

4

 

 

3

 

 

2

 

 

1

 

 

0

 

 

 

PORT C DATA REGISTER (PCD)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 6-7 I/O Port C Configuration

The NOP can be replaced by any instruction that allows parallel moves. Inserting one or more “MOVE DATA15,X:PORTC DATA24,Y:EXTERN” instructions between the first and second instruction produces an external 33-bit write each instruction cycle with only one instruction cycle lost in setup time:

MOVE

DATA9,X:PORTC

 

MOVE

DATA9,X:PORTC

DATA24,Y:EXTERN

MOVE

DATA9,X:PORTC

DATA24,Y:EXTERN

:

 

 

:

 

 

MOVE

DATA9,X:PORTC

DATA24,Y:EXTERN

NOP

 

DATA24,Y:EXTERN

One application of this technique is to create an extended address for Port A by concatenating the Port A address bits (instead of data bits) to the Port C general-purpose output bits. The Port C general-purpose I/O register would then work as a base address register, allowing the address space to be extended from 64K words (16 bits) to 33.5 million words

MOTOROLA PORT C 6 - 9

For More Information On This Product, Go to: www.freescale.com

Freescale Semiconductor, Inc.

GENERAL-PURPOSE I/O (PORT C)

(16 bits+ 9 bits=25 bits).

Port C uses the DSP central processing unit (CPU) four-phase clock for its operation. Therefore, if wait states are inserted in the DSP CPU timing, they also affect Port C timing. As a result, Port A and Port C in the previous synchronization example will always stay synchronized, regardless of how many wait states are used.

Freescale Semiconductor, Inc.

6 - 10 PORT C MOTOROLA

For More Information On This Product, Go to: www.freescale.com

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