Лабораторная работа 3 / FastChip / laba3

// Netlist written November 9, 2006 9:46:16 AM MSK
// By FastChip Version 2.6.0 Build 030604-1706
// Netlist last modified November 9, 2006 9:46:01 AM MSK
netlist
module toplevel {
%%props;
unsourcedNets = "APPRST, SIN0, SIN1, FIQ, IRQ0, IRQ1, IRQ2, CTS, DSR, DCD, RI",
doesNotOutdateBinding (
MSSIU,
Timer_0,
Timer_1,
UART_0,
UART_1,
ICU,
Watchdog,
DMA,
Power,
Scratchpad,
Cache
),
moduleTouchTimes (
and_nX1nX2nX3X4 = "1163052664288",
and_nX1nX2X3 = "1163053274746",
and_nX1nX2X4 = "1163052907217",
and_nX1nX3X4 = "1163052872668",
and_nX1X2nX3X4 = "1163053689392",
and_nX2X3 = "1163053406956",
and_nX2X3nX4 = "1163052689895",
and_nX2X3X4 = "1163053628424",
and_X1nX2nX3nX4 = "1163052944301",
and_X1nX2nX4 = "1163052680101",
and_X1X2X3 = "1163053140313",
and_X1X2X3nX4 = "1163052973913",
and_X1X3 = "1163052672290",
and_X1X3nX4 = "1163053196724",
Cache = "0",
Clocks = "0",
DMA = "0",
ICU = "0",
invert = "1163053435076",
MCU = "0",
MSSIU = "0",
or_a = "1163052808325",
or_b = "1163053689392",
or_c = "1163053349934",
or_d = "1163053756969",
or_e = "1163053962415",
or_f = "1163053962405",
or_g = "1163053962415",
Yg = "1163054179076",
Power = "0",
Scratchpad = "0",
Timer_0 = "0",
Timer_1 = "0",
UART_0 = "0",
UART_1 = "0",
Watchdog = "0",
X = "1163053689392",
Ya = "1163054179076",
Yb = "1163054126070",
Yc = "1163054138959",
Yd = "1163054148522",
Ye = "1163054159027",
Yf = "1163054169452"
)
%%end;
net and_nX1nX2nX3X4;
net and_nX1nX2X3;
net and_nX1nX2X4;
net and_nX1nX3X4;
net and_nX1X2nX3X4;
net and_nX2X3;
net and_nX2X3nX4;
net and_nX2X3X4;
net and_X1nX2nX3nX4;
net and_X1nX2nX4;
net and_X1X2X3;
net and_X1X2X3nX4;
net and_X1X3;
net and_X1X3nX4;
net notX1;
net notX2;
net notX3;
net notX4;
net X1;
net X2;
net X3;
net X4;
net Ya;
net Yb;
net Yc;
net Yd;
net Ye;
net Yf;
net Yg;
wide4 @(and_nX1nX2nX3X4:0,0) and_nX1nX2nX3X4.AND_WIDE4_0_0 (.ci=vcc, .co=and_nX1nX2nX3X4, .i={notX1,notX2,notX3,X4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_nX1nX2X3:0,0) and_nX1nX2X3.AND_WIDE4_0_0 (.ci=vcc, .co=and_nX1nX2X3, .i={vcc,notX1,notX2,X3}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_nX1nX2X4:0,0) and_nX1nX2X4.AND_WIDE4_0_0 (.ci=vcc, .co=and_nX1nX2X4, .i={vcc,notX1,notX2,X4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_nX1nX3X4:0,0) and_nX1nX3X4.AND_WIDE4_0_0 (.ci=vcc, .co=and_nX1nX3X4, .i={vcc,notX1,notX3,X4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_nX1X2nX3X4:0,0) and_nX1X2nX3X4.AND_WIDE4_0_0 (.ci=vcc, .co=and_nX1X2nX3X4, .i={notX1,X2,notX3,X4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_nX2X3:0,0) and_nX2X3.AND_WIDE4_0_0 (.ci=vcc, .co=and_nX2X3, .i={vcc,vcc,notX2,X3}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_nX2X3nX4:0,0) and_nX2X3nX4.AND_WIDE4_0_0 (.ci=vcc, .co=and_nX2X3nX4, .i={vcc,notX2,X3,notX4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_nX2X3X4:0,0) and_nX2X3X4.AND_WIDE4_0_0 (.ci=vcc, .co=and_nX2X3X4, .i={vcc,notX2,X3,X4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_X1nX2nX3nX4:0,0) and_X1nX2nX3nX4.AND_WIDE4_0_0 (.ci=vcc, .co=and_X1nX2nX3nX4, .i={X1,notX2,notX3,notX4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_X1nX2nX4:0,0) and_X1nX2nX4.AND_WIDE4_0_0 (.ci=vcc, .co=and_X1nX2nX4, .i={vcc,X1,notX2,notX4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_X1X2X3:0,0) and_X1X2X3.AND_WIDE4_0_0 (.ci=vcc, .co=and_X1X2X3, .i={vcc,X1,X2,X3}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_X1X2X3nX4:0,0) and_X1X2X3nX4.AND_WIDE4_0_0 (.ci=vcc, .co=and_X1X2X3nX4, .i={X1,X2,X3,notX4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_X1X3:0,0) and_X1X3.AND_WIDE4_0_0 (.ci=vcc, .co=and_X1X3, .i={vcc,vcc,X1,X3}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
wide4 @(and_X1X3nX4:0,0) and_X1X3nX4.AND_WIDE4_0_0 (.ci=vcc, .co=and_X1X3nX4, .i={vcc,X1,X3,notX4}, :initv="#b1000_0000_0000_0000", :widefunc="AND");
lut4 invert.inv_0 (.i={null,null,null,X4}, .o=notX4, :eq="~0");
lut4 invert.inv_1 (.i={null,null,null,X3}, .o=notX3, :eq="~0");
lut4 invert.inv_2 (.i={null,null,null,X2}, .o=notX2, :eq="~0");
lut4 invert.inv_3 (.i={null,null,null,X1}, .o=notX1, :eq="~0");
wide4 @(or_a:0,0) or_a.AND_WIDE4_0_0 (.ci=gnd, .co=Ya, .i={and_X1X3,and_X1nX2nX4,and_nX2X3nX4,and_nX1nX2nX3X4}, :initv="#b1111_1111_1111_1110", :widefunc="OR");
wide4 @(or_b:0,0) or_b.AND_WIDE4_0_0 (.ci=gnd, .co=Yb, .i={and_nX1nX3X4,and_nX1nX2X4,and_X1nX2nX3nX4,and_X1X2X3nX4}, :initv="#b1111_1111_1111_1110", :widefunc="OR");
wide4 @(or_c:0,0) or_c.AND_WIDE4_0_0 (.ci=gnd, .co=Yc, .i={and_X1X2X3,and_X1X3nX4,and_nX1nX3X4,and_nX1nX2X3}, :initv="#b1111_1111_1111_1110", :widefunc="OR");
wide4 @(or_d:0,0) or_d.AND_WIDE4_0_0 (.ci=gnd, .co=Yd, .i={and_X1X3,and_nX2X3,and_X1nX2nX4,and_nX1nX3X4}, :initv="#b1111_1111_1111_1110", :widefunc="OR");
wide4 @(or_e:0,0) or_e.AND_WIDE4_0_0 (.ci=gnd, .co=Ye, .i={and_X1X3,and_X1nX2nX4,and_nX2X3X4,and_nX1X2nX3X4}, :initv="#b1111_1111_1111_1110", :widefunc="OR");
wide4 @(or_f:0,0) or_f.AND_WIDE4_0_0 (.ci=gnd, .co=Yf, .i={gnd,and_X1X3,and_nX1nX3X4,and_nX2X3nX4}, :initv="#b1111_1111_1111_1110", :widefunc="OR");
wide4 @(or_g:0,0) or_g.AND_WIDE4_0_0 (.ci=gnd, .co=Yg, .i={and_nX2X3,and_X1X3nX4,and_X1nX2nX4,and_nX1nX3X4}, :initv="#b1111_1111_1111_1110", :widefunc="OR");
tpad X.0 (.i=X4, .o=gnd, .oe=gnd, :busMinder="NONE", :hysteresis="true", :isClamped="false", :isInputLowPower="true");
tpad X.1 (.i=X3, .o=gnd, .oe=gnd, :busMinder="NONE", :hysteresis="true", :isClamped="false", :isInputLowPower="true");
tpad X.2 (.i=X2, .o=gnd, .oe=gnd, :busMinder="NONE", :hysteresis="true", :isClamped="false", :isInputLowPower="true");
tpad X.3 (.i=X1, .o=gnd, .oe=gnd, :busMinder="NONE", :hysteresis="true", :isClamped="false", :isInputLowPower="true");
tpad Ya. (.o=Ya, .oe=vcc, :drive="WEAK", :isOutputLowPower="true", :slewRate="SLOW");
tpad Yb. (.o=Yb, .oe=vcc, :drive="WEAK", :isOutputLowPower="true", :slewRate="SLOW");
tpad Yc. (.o=Yc, .oe=vcc, :drive="WEAK", :isOutputLowPower="true", :slewRate="SLOW");
tpad Yd. (.o=Yd, .oe=vcc, :drive="WEAK", :isOutputLowPower="true", :slewRate="SLOW");
tpad Ye. (.o=Ye, .oe=vcc, :drive="WEAK", :isOutputLowPower="true", :slewRate="SLOW");
tpad Yf. (.o=Yf, .oe=vcc, :drive="WEAK", :isOutputLowPower="true", :slewRate="SLOW");
tpad Yg. (.o=Yg, .oe=vcc, :drive="WEAK", :isOutputLowPower="true", :slewRate="SLOW");
}