- •Features
- •1. Description
- •2. Pin Configuration
- •3. Block Diagram
- •4. Pin Description
- •4.3 Port 1
- •4.4 Port 3
- •4.6 XTAL1
- •4.7 XTAL2
- •5. Oscillator Characteristics
- •6. Special Function Registers
- •7. Restrictions on Certain Instructions
- •7.1 Branching Instructions
- •8. Program Memory Lock Bits
- •9. Idle Mode
- •10. Power-down Mode
- •11. Programming The Flash
- •12. Programming Interface
- •13. Flash Programming Modes
- •14. Flash Programming and Verification Characteristics
- •15. Flash Programming and Verification Waveforms
- •16. Absolute Maximum Ratings*
- •17. DC Characteristics
- •18. External Clock Drive Waveforms
- •19. External Clock Drive
- •20. Serial Port Timing: Shift Register Mode Test Conditions
- •21. Shift Register Mode Timing Waveforms
- •22. AC Testing Input/Output Waveforms(1)
- •23. Float Waveforms(1)
- •24. ICC (Active Mode) Measurements
- •25. ICC (Idle Mode) Measurements
- •26. ICC (Power Down Mode) Measurements
- •27. Ordering Information
- •27.1 Standard Package
- •28. Package Information
AT89C2051
14. Flash Programming and Verification Characteristics
TA = 0°C to 70°C, VCC = 5.0 ± 10%
Symbol |
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Parameter |
Min |
Max |
Units |
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VPP |
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Programming Enable Voltage |
11.5 |
12.5 |
V |
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IPP |
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Programming Enable Current |
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250 |
µA |
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tDVGL |
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Data Setup to |
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Low |
1.0 |
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µs |
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PROG |
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tGHDX |
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Data Hold after |
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1.0 |
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µs |
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PROG |
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tEHSH |
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P3.4 |
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High to VPP |
1.0 |
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µs |
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(ENABLE) |
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tSHGL |
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VPP Setup to |
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Low |
10 |
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µs |
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PROG |
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tGHSL |
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VPP Hold after |
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10 |
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µs |
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PROG |
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tGLGH |
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Width |
1 |
110 |
µs |
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PROG |
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tELQV |
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Low to Data Valid |
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1.0 |
µs |
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ENABLE |
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tEHQZ |
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Data Float after |
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0 |
1.0 |
µs |
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ENABLE |
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tGHBL |
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High to |
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Low |
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50 |
ns |
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PROG |
BUSY |
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tWC |
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Byte Write Cycle Time |
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2.0 |
ms |
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tBHIH |
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to Increment Clock Delay |
1.0 |
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µs |
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RDY/BSY\ |
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tIHIL |
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Increment Clock High |
200 |
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ns |
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Note: 1. |
Only used in 12-volt programming mode. |
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15. Flash Programming and Verification Waveforms
11
0368G–MICRO–6/05
16. Absolute Maximum Ratings*
.................................Operating Temperature |
-55°C to +125°C |
*NOTICE: Stresses beyond those listed under “Absolute |
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Maximum Ratings” may cause permanent dam- |
Storage Temperature ..................................... |
-65°C to +150°C |
age to the device. This is a stress rating only and |
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functional operation of the device at these or any |
Voltage on Any Pin |
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other conditions beyond those indicated in the |
with Respect to Ground ..................................... |
-1.0V to +7.0V |
operational sections of this specification is not |
Maximum Operating Voltage |
6.6V |
implied. Exposure to absolute maximum rating |
conditions for extended periods may affect device |
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DC Output Current |
25.0 mA |
reliability. |
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17. DC Characteristics
TA = -40°C to 85°C, VCC = 2.7V to 6.0V (unless otherwise noted)
Symbol |
Parameter |
Condition |
Min |
Max |
Units |
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VIL |
Input Low-voltage |
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-0.5 |
0.2 VCC - 0.1 |
V |
VIH |
Input High-voltage |
(Except XTAL1, RST) |
0.2 VCC + 0.9 |
VCC + 0.5 |
V |
VIH1 |
Input High-voltage |
(XTAL1, RST) |
0.7 VCC |
VCC + 0.5 |
V |
VOL |
Output Low-voltage(1) |
IOL = 20 mA, VCC = 5V |
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0.5 |
V |
(Ports 1, 3) |
IOL = 10 mA, VCC = 2.7V |
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Output High-voltage |
IOH = -80 µA, VCC = 5V ± 10% |
2.4 |
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V |
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VOH |
IOH = -30 µA |
0.75 VCC |
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V |
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(Ports 1, 3) |
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IOH = -12 µA |
0.9 VCC |
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V |
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IIL |
Logical 0 Input Current |
VIN = 0.45V |
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-50 |
µA |
(Ports 1, 3) |
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ITL |
Logical 1 to 0 Transition Current |
VIN = 2V, VCC = 5V ± 10% |
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-750 |
µA |
(Ports 1, 3) |
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ILI |
Input Leakage Current |
0 < VIN < VCC |
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±10 |
µA |
(Port P1.0, P1.1) |
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VOS |
Comparator Input Offset Voltage |
VCC = 5V |
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20 |
mV |
VCM |
Comparator Input Common |
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0 |
VCC |
V |
Mode Voltage |
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RRST |
Reset Pull-down Resistor |
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50 |
300 |
kΩ |
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CIO |
Pin Capacitance |
Test Freq. = 1 MHz, TA = 25°C |
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10 |
pF |
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Active Mode, 12 MHz, VCC = 6V/3V |
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15/5.5 |
mA |
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Power Supply Current |
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Idle Mode, 12 MHz, VCC = 6V/3V |
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5/1 |
mA |
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ICC |
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P1.0 & P1.1 = 0V or VCC |
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Power-down Mode(2) |
VCC = 6V, P1.0 & P1.1 = 0V or VCC |
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100 |
µA |
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VCC = 3V, P1.0 & P1.1 = 0V or VCC |
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20 |
µA |
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Notes: 1. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum IOL per port pin: 20 mA
Maximum total IOL for all output pins: 80 mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions.
2. Minimum VCC for Power-down is 2V.
12 AT89C2051
0368G–MICRO–6/05
AT89C2051
18. External Clock Drive Waveforms
19. External Clock Drive
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VCC = 2.7V to 6.0V |
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VCC = 4.0V to 6.0V |
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Symbol |
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Parameter |
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Min |
Max |
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Min |
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Max |
Units |
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1/tCLCL |
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Oscillator Frequency |
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0 |
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12 |
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0 |
24 |
MHz |
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tCLCL |
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Clock Period |
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83.3 |
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41.6 |
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ns |
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tCHCX |
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High Time |
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30 |
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15 |
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ns |
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tCLCX |
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Low Time |
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30 |
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15 |
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ns |
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tCLCH |
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Rise Time |
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20 |
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20 |
ns |
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tCHCL |
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Fall Time |
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20 |
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20 |
ns |
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() |
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20. Serial Port Timing: Shift Register Mode Test Conditions |
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VCC = 5.0V ± 20%; Load Capacitance = 80 pF |
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12 MHz Osc |
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Variable Oscillator |
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Symbol |
Parameter |
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Min |
Max |
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Min |
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Max |
Units |
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tXLXL |
Serial Port Clock Cycle Time |
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1.0 |
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12 tCLCL |
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µs |
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tQVXH |
Output Data Setup to Clock Rising Edge |
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700 |
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10 tCLCL-133 |
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ns |
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tXHQX |
Output Data Hold after Clock Rising Edge |
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50 |
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2 tCLCL-117 |
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ns |
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tXHDX |
Input Data Hold after Clock Rising Edge |
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0 |
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0 |
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ns |
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tXHDV |
Clock Rising Edge to Input Data Valid |
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700 |
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10 tCLCL-133 |
ns |
13
0368G–MICRO–6/05
21. Shift Register Mode Timing Waveforms
22. AC Testing Input/Output Waveforms(1)
Note: 1. AC Inputs during testing are driven at VCC - 0.5V for a logic 1 and 0.45V for a logic 0. Timing measurements are made at VIH min. for a logic 1 and VIL max. for a logic 0.
23. Float Waveforms(1)
Note: 1. For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to float when 100 mV change from the loaded VOH/VOL level occurs.
14 AT89C2051
0368G–MICRO–6/05